On Monday 07 April 2008 22:54:41 David Gibson wrote: > On Mon, Apr 07, 2008 at 10:25:32PM -0500, Hollis Blanchard wrote: > > On Monday 07 April 2008 20:11:28 David Gibson wrote: > > > On Mon, Apr 07, 2008 at 03:53:33PM -0500, Hollis Blanchard wrote: > > > > 1 file changed, 7 insertions(+) > > > > include/linux/kvm.h | 7 +++++++ > > > > > > > > > > > > Device Control Registers are essentially another address space found > > > > on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always > > > > 32 bits, and are identified by a 32-bit number. > > > > > > Well... 10-bit, actually. > > > > The mtdcrux description in the ppc440x6 user manual says the following: > > > > Let the contents of register RA denote a Device Control Register. > > The contents of GPR[RS] are placed into the designated Device Control > > Register. > > > > I take that to mean that we must worry about 32 bits worth of DCR > > numbers. Perhaps I should say "no more than" rather than "always". > > I think that's less misleading. mtdcrux is very new, anything which > only has the mtdcr instruction certainly can't take DCR numbers above > 10 bits, and I would expect that even on chips with mtdcrux the DCR > bus is probably still only 10-bits, although it could be extended.
We're defining a kernel/userspace interface here, and since the hardware is capable of 32-bit DCR numbers, I don't think it makes any sense to not support that. Also, we would just end up placing that number into a u32 anyways, so... :) -- Hollis Blanchard IBM Linux Technology Center ------------------------------------------------------------------------- This SF.net email is sponsored by the 2008 JavaOne(SM) Conference Register now and save $200. Hurry, offer ends at 11:59 p.m., Monday, April 7! Use priority code J8TLD2. http://ad.doubleclick.net/clk;198757673;13503038;p?http://java.sun.com/javaone _______________________________________________ kvm-devel mailing list kvm-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/kvm-devel
