> -----Original Message----- > From: kvm-ppc-ow...@vger.kernel.org > [mailto:kvm-ppc-ow...@vger.kernel.org] On Behalf Of Hollis Blanchard > Sent: Tuesday, December 16, 2008 11:44 PM > To: Liu Yu-B13201 > Cc: kvm-ppc@vger.kernel.org > Subject: RE: [PATCH 07/11] E500 TLB emulation > > On Tue, 2008-12-16 at 18:08 +0800, Liu Yu wrote: > > > > > To fix this, instead of doing error-checking in all these > > > sites, I would > > > just mask with 1 instead of 3. > > > > > > > If the guest instruction appoint MAS0[TLBSEL] = 2 or 3, > > I think the best way is to ignore it. > > Masking with 1 instead of 3 will ignore it. Or do you mean completely > ignore the instruction? The mask is and simpler and faster, and also > perfectly legal (it was a software error to begin with). > > Actually, my e500 user manual (covering v1 and v2) says the > TLBSEL field > is only 1 bit wide, with reserved bits on either side. So > masking with 1 > is clearly the right solution. >
I found the problem. Old manual explain the tlbivax EA format that bit 60 is used for tlbsel. Howerver the newest verstion tells that bit 59~60 of tlbivax EA are used for tlbsel. Correspondingly, the MAS0 use 34~35 bits for tlbsel now. http://www.freescale.com/files/32bit/doc/ref_manual/EREFRM.pdf?WT_TYPE=R eference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Docum entation I think I should check the case that tlbsel is not valid in the code. -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
