Signed-off-by: Liu Yu <yu....@freescale.com>
---
hw/ppce500.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
hw/ppce500.h | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 140 insertions(+), 0 deletions(-)
create mode 100644 hw/ppce500.c
create mode 100644 hw/ppce500.h
diff --git a/hw/ppce500.c b/hw/ppce500.c
new file mode 100644
index 0000000..13eab47
--- /dev/null
+++ b/hw/ppce500.c
@@ -0,0 +1,74 @@
+/*
+ * Qemu PowerPC E500 core emualtion
+ *
+ * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu....@freescale.com>
+ *
+ * This file is derived from hw/ppc440.c
+ * the copyright for that material belongs to the original owners.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include "hw.h"
+#include "pc.h"
+#include "hw/isa.h"
+#include "ppce500.h"
+#include "sysemu.h"
+
+#define PPCE500_SERIAL0_REGS 0x4500
+#define PPCE500_SERIAL1_REGS 0x4600
+#define PPCE500_MPIC_REGS 0x40000
+#define bytes_to_mb(a) (a>>20)
+
+CPUState *ppce500_init(ram_addr_t *ram_size,
+ qemu_irq **pic,
+ target_ulong ccsrbar_base)
+{
+ qemu_irq *mpic_irq, *irqs;
+ SerialState * serial[2];
+ int ram_stick_sizes[] = {512<<20, 256<<20}; /* in bytes */
+ int i;
+ ram_addr_t tmp_ram_size;
+ CPUState *env;
+
+ /* Setup Memory */
+ tmp_ram_size = *ram_size;
+
+ for (i=0; i<(sizeof(ram_stick_sizes)/sizeof(ram_stick_sizes[0])); i++)
+ while ((tmp_ram_size/ram_stick_sizes[i]) > 0)
+ tmp_ram_size -= ram_stick_sizes[i];
+
+ if (tmp_ram_size)
+ *ram_size -= tmp_ram_size;
+
+ env = cpu_ppc_init("e500v2_v30");
+ if (!env) {
+ fprintf(stderr, "Unable to initilize CPU!\n");
+ exit(1);
+ }
+
+ /* mpic */
+ irqs = qemu_mallocz(sizeof(qemu_irq) * MPIC_OUTPUT_NB);
+ irqs[MPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
+ irqs[MPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
+ mpic_irq = mpic_init(ccsrbar_base + PPCE500_MPIC_REGS, 1, &irqs, NULL);
+ *pic = mpic_irq;
+
+ /* serial */
+ if (serial_hds[0])
+ serial[0] = serial_mm_init(ccsrbar_base + PPCE500_SERIAL0_REGS,
+ 0, mpic_irq[12+26], 399193,
+ serial_hds[0], 1);
+
+ if (serial_hds[1])
+ serial[0] = serial_mm_init(ccsrbar_base + PPCE500_SERIAL1_REGS,
+ 0, mpic_irq[12+26], 399193,
+ serial_hds[0], 1);
+
+ return env;
+}
diff --git a/hw/ppce500.h b/hw/ppce500.h
new file mode 100644
index 0000000..3fa8604
--- /dev/null
+++ b/hw/ppce500.h
@@ -0,0 +1,66 @@
+/*
+ * QEMU PowerPC E500 emulation shared definitions
+ *
+ * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu....@freescale.com>
+ *
+ * This file is derived from hw/ppc440.h
+ * the copyright for that material belongs to the original owners.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#if !defined(PPC_E500_H)
+#define PPC_E500_H
+
+#include "hw.h"
+#include "pc.h"
+#include "qemu-timer.h"
+#include "sysemu.h"
+#include "exec-all.h"
+#include "boards.h"
+
+/* PowerPC E500 XXX initialization */
+extern CPUState *ppce500_init(ram_addr_t *ram_size,
+ qemu_irq **pic,
+ target_ulong ccsrbar_base);
+
+enum {
+ PPCUIC_OUTPUT_INT = 0,
+ PPCUIC_OUTPUT_CINT = 1,
+ PPCUIC_OUTPUT_NB,
+};
+
+struct pci_outbound {
+ uint32_t potar;
+ uint32_t potear;
+ uint32_t powbar;
+ uint32_t powar;
+};
+
+struct pci_inbound {
+ uint32_t pitar;
+ uint32_t piwbar;
+ uint32_t piwbear;
+ uint32_t piwar;
+};
+
+PCIBus *ppce500_pci_init(qemu_irq *pic, target_phys_addr_t registers);
+
+/* mpic.c */
+/* MPIC have 5 outputs per CPU connected and one IRQ out single output */
+enum {
+ MPIC_OUTPUT_INT = 0, /* IRQ */
+ MPIC_OUTPUT_CINT, /* critical IRQ */
+ MPIC_OUTPUT_MCK, /* Machine check event */
+ MPIC_OUTPUT_DEBUG, /* Inconditional debug event */
+ MPIC_OUTPUT_RESET, /* Core reset event */
+ MPIC_OUTPUT_NB,
+};
+qemu_irq *mpic_init (target_phys_addr_t base, int nb_cpus,
+ qemu_irq **irqs, qemu_irq irq_out);
+#endif /* !defined(PPC_E500_H) */
--
1.5.4
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