Liu, Only PID0 is being used, PID1 and PID2 are unused 

> -----Original Message-----
> From: Liu Yu-B13201 [mailto:yu....@freescale.com]
> Sent: Monday, April 27, 2009 12:20 AM
> To: Liu Yu-B13201; kvm-ppc@vger.kernel.org
> Cc: holl...@us.ibm.com; Rahul Kulkarni
> Subject: RE: [PATCH 0/3] kvm/e500: Add shadow id mappings
> 
> 
> Rahul,
> 
> I wonder if NetBSD use E500's PID1 or PID2?
> If so these code may not be enough to make NetBSD's mm happy.
> 
> 
> > -----Original Message-----
> > From: kvm-ppc-ow...@vger.kernel.org
> > [mailto:kvm-ppc-ow...@vger.kernel.org] On Behalf Of Liu Yu-B13201
> > Sent: Monday, April 27, 2009 2:59 PM
> > To: kvm-ppc@vger.kernel.org
> > Cc: holl...@us.ibm.com; rkulk...@force10networks.com
> > Subject: [PATCH 0/3] kvm/e500: Add shadow id mappings
> >
> > Although these patches are still needed some cleanup,
> > I'd like to send them for review.
> >
> > patch 1: remove shadow TLB array. so that we won't suffer
> > coherence issue
> >          when apply shadow id mappings.
> > patch 2: add shadow id mappings
> > patch 3: add tlb0 entry invalidate.
> >          Although it was fine without it, it's a bug we
> > didn't add it before.
> >
> > The code is simply tested on MPC8572(duel core)
> > by startup 3 VM simultaneous.
> >
> > Havent done any performance test.
> >
> >
> >
> > --
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