From: Mihai Caraman <mihai.cara...@freescale.com>

64-bit host needs to remain in 64-bit mode when an exception take place.
Set interrupt computaion mode in EPCR register.

Signed-off-by: Mihai Caraman <mihai.cara...@freescale.com>
Signed-off-by: Alexander Graf <ag...@suse.de>
---
 arch/powerpc/kvm/e500mc.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index fe6c1de..db97ee3 100644
--- a/arch/powerpc/kvm/e500mc.c
+++ b/arch/powerpc/kvm/e500mc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved.
  *
  * Author: Varun Sethi, <varun.se...@freescale.com>
  *
@@ -183,6 +183,9 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
 
        vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \
                                 SPRN_EPCR_DUVD;
+#ifdef CONFIG_64BIT
+       vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM;
+#endif
        vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_DEP | MSRP_PMMP;
        vcpu->arch.eplc = EPC_EGS | (vcpu->kvm->arch.lpid << EPC_ELPID_SHIFT);
        vcpu->arch.epsc = vcpu->arch.eplc;
-- 
1.6.0.2

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