Add ONE_REG IVORs support, with IVORs 0-15 and 35 booke common.
Signed-off-by: Mihai Caraman <mihai.cara...@freescale.com>
---
v3:
- new patch
arch/powerpc/include/uapi/asm/kvm.h | 24 +++++++
arch/powerpc/kvm/booke.c | 132 ++++++++++++++++++++++++++++++++++++
arch/powerpc/kvm/e500.c | 42 +++++++++++-
arch/powerpc/kvm/e500mc.c | 32 +++++++++
4 files changed, 228 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/uapi/asm/kvm.h
b/arch/powerpc/include/uapi/asm/kvm.h
index 7a27ff0..174fed0 100644
--- a/arch/powerpc/include/uapi/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
@@ -563,6 +563,30 @@ struct kvm_get_htab_header {
#define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb9)
#define KVM_REG_PPC_SPRG9 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xba)
+/* Booke IVOR registers */
+#define KVM_REG_PPC_IVOR0 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc0)
+#define KVM_REG_PPC_IVOR1 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc1)
+#define KVM_REG_PPC_IVOR2 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc2)
+#define KVM_REG_PPC_IVOR3 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc3)
+#define KVM_REG_PPC_IVOR4 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc4)
+#define KVM_REG_PPC_IVOR5 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc5)
+#define KVM_REG_PPC_IVOR6 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc6)
+#define KVM_REG_PPC_IVOR7 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc7)
+#define KVM_REG_PPC_IVOR8 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc8)
+#define KVM_REG_PPC_IVOR9 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc9)
+#define KVM_REG_PPC_IVOR10 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xca)
+#define KVM_REG_PPC_IVOR11 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcb)
+#define KVM_REG_PPC_IVOR12 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcc)
+#define KVM_REG_PPC_IVOR13 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcd)
+#define KVM_REG_PPC_IVOR14 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xce)
+#define KVM_REG_PPC_IVOR15 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcf)
+#define KVM_REG_PPC_IVOR32 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd0)
+#define KVM_REG_PPC_IVOR33 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd1)
+#define KVM_REG_PPC_IVOR34 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd2)
+#define KVM_REG_PPC_IVOR35 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd3)
+#define KVM_REG_PPC_IVOR36 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd4)
+#define KVM_REG_PPC_IVOR37 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd5)
+
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRs
*/
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 4fe7f68..ffa82a5 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1565,6 +1565,72 @@ int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
int r = 0;
switch (id) {
+ case KVM_REG_PPC_IVOR0:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]);
+ break;
+ case KVM_REG_PPC_IVOR1:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]);
+ break;
+ case KVM_REG_PPC_IVOR2:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
+ break;
+ case KVM_REG_PPC_IVOR3:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]);
+ break;
+ case KVM_REG_PPC_IVOR4:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]);
+ break;
+ case KVM_REG_PPC_IVOR5:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]);
+ break;
+ case KVM_REG_PPC_IVOR6:
+ *val = get_reg_val(id, vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]);
+ break;
+ case KVM_REG_PPC_IVOR7:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]);
+ break;
+ case KVM_REG_PPC_IVOR8:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]);
+ break;
+ case KVM_REG_PPC_IVOR9:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]);
+ break;
+ case KVM_REG_PPC_IVOR10:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]);
+ break;
+ case KVM_REG_PPC_IVOR11:
+ *val = get_reg_val(id, vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]);
+ break;
+ case KVM_REG_PPC_IVOR12:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]);
+ break;
+ case KVM_REG_PPC_IVOR13:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]);
+ break;
+ case KVM_REG_PPC_IVOR14:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]);
+ break;
+ case KVM_REG_PPC_IVOR15:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]);
+ break;
+ case KVM_REG_PPC_IVOR35:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
+ break;
case KVM_REG_PPC_IAC1:
*val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
break;
@@ -1621,6 +1687,72 @@ int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
int r = 0;
switch (id) {
+ case KVM_REG_PPC_IVOR0:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR1:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR2:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR3:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR4:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR5:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR6:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR7:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR8:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR9:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR10:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR11:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR12:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR13:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR14:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR15:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR35:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
+ set_reg_val(id, *val);
+ break;
case KVM_REG_PPC_IAC1:
vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
break;
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 2e02ed8..08f61bf 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -433,14 +433,52 @@ static int kvmppc_core_set_sregs_e500(struct kvm_vcpu
*vcpu,
static int kvmppc_get_one_reg_e500(struct kvm_vcpu *vcpu, u64 id,
union kvmppc_one_reg *val)
{
- int r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
+ int r = 0;
+
+ switch (id) {
+ case KVM_REG_PPC_IVOR32:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
+ break;
+ case KVM_REG_PPC_IVOR33:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
+ break;
+ case KVM_REG_PPC_IVOR34:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
+ break;
+ default:
+ r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
+ break;
+ }
+
return r;
}
static int kvmppc_set_one_reg_e500(struct kvm_vcpu *vcpu, u64 id,
union kvmppc_one_reg *val)
{
- int r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
+ int r = 0;
+
+ switch (id) {
+ case KVM_REG_PPC_IVOR32:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR33:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR34:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] =
+ set_reg_val(id, *val);
+ break;
+ default:
+ r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
+ break;
+ }
+
return r;
}
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index 67c06eb..19dd927 100644
--- a/arch/powerpc/kvm/e500mc.c
+++ b/arch/powerpc/kvm/e500mc.c
@@ -268,6 +268,22 @@ static int kvmppc_get_one_reg_e500mc(struct kvm_vcpu
*vcpu, u64 id,
int r = 0;
switch (id) {
+ case KVM_REG_PPC_IVOR32:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL]);
+ break;
+ case KVM_REG_PPC_IVOR33:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST]);
+ break;
+ case KVM_REG_PPC_IVOR36:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]);
+ break;
+ case KVM_REG_PPC_IVOR37:
+ *val = get_reg_val(id,
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]);
+ break;
case KVM_REG_PPC_SPRG9:
*val = get_reg_val(id, vcpu->arch.sprg9);
break;
@@ -284,6 +300,22 @@ static int kvmppc_set_one_reg_e500mc(struct kvm_vcpu
*vcpu, u64 id,
int r = 0;
switch (id) {
+ case KVM_REG_PPC_IVOR32:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR33:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR36:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] =
+ set_reg_val(id, *val);
+ break;
+ case KVM_REG_PPC_IVOR37:
+ vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] =
+ set_reg_val(id, *val);
+ break;
case KVM_REG_PPC_SPRG9:
vcpu->arch.sprg9 = set_reg_val(id, *val);
break;
--
1.7.11.7
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