Intel manual 22.3.1.2 demands that the accessed bit (bit 0 in type field)
must be set when on DS,ES,FS and GS when the selector is usable.
This fixes cross vendor migration from AMD to Intel.
I am not sure what the real purpose of this check is, so I put this
in the VMX path and not in the SVM one. If someone has an explanation
which justifies a move, I am happy to do this.
Signed-off-by: Andre Przywara <andre.przyw...@amd.com>
---
arch/x86/kvm/vmx.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 9b56d21..d19e39c 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1723,6 +1723,11 @@ static void vmx_set_segment(struct kvm_vcpu *vcpu,
ar = 0xf3;
} else
ar = vmx_segment_access_rights(var);
+
+ /* 22.3.1.2 demands that the accessed bit must be set on [DEFG]S */
+ if (var->s && (sf->ar_bytes & AR_UNUSABLE_MASK) == 0)
+ ar |= 0x1;
+
vmcs_write32(sf->ar_bytes, ar);
}
--
1.5.2.2
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