On 05/20/2014 03:52 PM, James Hogan wrote:
Hi Andreas,
On Tuesday 20 May 2014 16:47:04 Andreas Herrmann wrote:
From: David Daney <david.da...@cavium.com>
CVMSEG is related to the CPU core not the SoC system. So needs to be
configurable there.
Signed-off-by: David Daney <david.da...@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrm...@caviumnetworks.com>
---
arch/mips/cavium-octeon/Kconfig | 30 ++++++++++++++++++++----------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/arch/mips/cavium-octeon/Kconfig
b/arch/mips/cavium-octeon/Kconfig index 227705d..c5e9975 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
[...]
-config CAVIUM_OCTEON_CVMSEG_SIZE
- int "Number of L1 cache lines reserved for CVMSEG memory"
- range 0 54
- default 1
+config CAVIUM_OCTEON_HW_FIX_UNALIGNED
+ bool "Enable hardware fixups of unaligned loads and stores"
+ default "y"
Is adding CAVIUM_OCTEON_HW_FIX_UNALIGNED in this patch intentional? It seems
unrelated.
Good catch. CAVIUM_OCTEON_HW_FIX_UNALIGNED and its users were removed,
we shouldn't add it back. I think this is a case of rebasing gone wrong.
David Daney
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