Linux has some requirements that must be satisfied in order to boot on a system built with a GICv3.
Acked-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> --- Documentation/arm64/booting.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt index 37fc4f6..e28ccec 100644 --- a/Documentation/arm64/booting.txt +++ b/Documentation/arm64/booting.txt @@ -141,6 +141,12 @@ Before jumping into the kernel, the following conditions must be met: the kernel image will be entered must be initialised by software at a higher exception level to prevent execution in an UNKNOWN state. + For systems with a GICv3 interrupt controller, it is expected that: + - If EL3 is present, it must program ICC_SRE_EL3.Enable (bit 3) to + 0b1 and ICC_SRE_EL3.SRE (bit 0) to 0b1. + - If the kernel is entered at EL1, EL2 must set ICC_SRE_EL2.Enable + (bit 3) to 0b1 and ICC_SRE_EL2.SRE (bit 0) to 0b1. + The requirements described above for CPU mode, caches, MMUs, architected timers, coherency and system registers apply to all CPUs. All CPUs must enter the kernel in the same exception level. -- 1.8.3.4 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
