On Thu, Sep 18, 2014 at 2:21 PM, Nakajima, Jun <jun.nakaj...@intel.com> wrote: > On Thu, Sep 18, 2014 at 12:07 PM, Andy Lutomirski <l...@amacapital.net> wrote: > >> Might Intel be willing to extend that range to 0x40000000 - >> 0x400fffff? And would Microsoft be okay with using this mechanism for >> discovery? > > So, for CPUID, the SDM (Table 3-17. Information Returned by CPUID) says today: > "No existing or future CPU will return processor identification or > feature information if the initial EAX value is in the range 40000000H > to 4FFFFFFFH." > > We can define a cross-VM CPUID range from there. The CPUID can return > the index of the MSR if needed.
Right, sorry. I was looking at this sentence in SDM Volume 3 Section 35.1: MSR address range between 40000000H - 400000FFH is marked as a specially reserved range. All existing and future processors will not implement any features using any MSR in this range. That's not really a large enough range for us to reserve an MSR for this. However, KVM, is already using MSRs outside that range: it uses 0x4b564d00-0x4b564d04 or so. I wonder whether KVM got confused by the differing ranges for cpuid leaves and MSR indices. Any chance that Intel could reserve a larger range to include the KVM MSRs? It would also be easier if the MSR indices for cross-HV features were constants. Thanks, Andy -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
