On 05/11/2014 14:20, Nadav Amit wrote: >> > Actually it shouldn't be after INIT. XCR0 is not mentioned explicitly >> > in Table 9-1 of the SDM (IA-32 Processor States Following Power-up, >> > Reset, or INIT), but since MSR_IA32_XSS is not specified, I think XCR0 >> > should fall under "All other MSRs”. > > I should have given a reference, since Intel SDM is a wild place - see > section 2.6 “EXTENDED CONTROL REGISTERS (INCLUDING XCR0)” : "After reset, all > bits (except bit 0) in XCR0 are cleared to zero, XCR0[0] is set to 1."
Yes, I found that, but INIT is not reset. :) Reset is typically handled by userspace in the case of KVM. kvm_vcpu_reset is only called by KVM when you get an INIT interrupt, in kvm_accept_apic_events. Paolo -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
