On 05/01/2015 19:56, Andy Lutomirski wrote: >> > 1) State: all pvtis marked as PVCLOCK_TSC_STABLE_BIT. >> > 1) Update request for all vcpus, for a TSC_STABLE_BIT -> ~TSC_STABLE_BIT >> > transition. >> > 2) vCPU-1 updates its pvti with new values. >> > 3) vCPU-0 still has not updated its pvti with new values. >> > 4) vCPU-1 VM-enters, uses vCPU-0 values, even though it has been >> > notified of a TSC_STABLE_BIT -> ~TSC_STABLE_BIT transition. >> > >> > The update is not actually atomic across all vCPUs, its atomic in >> > the sense of not allowing visibility of distinct >> > system_timestamp/tsc_timestamp values. >> > > Hmm. In step 4, is there a guarantee that vCPU-0 won't VM-enter until > it gets marked unstable? Otherwise the vdso could could just as > easily be called from vCPU-1, migrated to vCPU-0, read the data > complete with stale stable bit, and get migrated back to vCPU-1. > > But I thought that KVM currently froze all vCPUs when updating pvti > for any of them. How can this happen? I admit I don't really > understand the update request code.
That was also my understanding. I thought this was the point of kvm_make_mclock_inprogress_request/KVM_REQ_MCLOCK_INPROGRESS. Disabling TSC_STABLE_BIT is triggered by pvclock_gtod_update_fn but it happens in kvm_gen_update_masterclock, and no guest entries will happen in the meanwhile. Paolo -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
