On 2015-05-13 11:24, Paolo Bonzini wrote: > > > On 13/05/2015 10:10, Jan Kiszka wrote: >>>>>> There can even be multiple IOAPICs (thanks to your patches overcoming >>>>>> the single in-kernel instance). >>>> >>>> With multiple IOAPICs you have more than 24 GSIs per IOAPIC. That means >> I don't think that the number of pins per IOAPIC increases. At least not >> in the devices I've seen so far. > > Sorry, that was supposed to be "more than 24 GSIs for the IOAPICs". > >>>> that the above loop is broken for multiple IOAPICs. >> The worst case remains #IOAPIC * 24 iterations - if we have means to >> stop after the IOAPIC entries, not iterating over all routes. > > Yes. Which is not too bad if VCPUs can process it in parallel. > >>>> But perhaps when enabling KVM_SPLIT_IRQCHIP we can use args[0] to pass >>>> the number of IOAPIC routes that will cause EOI exits? >> And you need to ensure that their routes can be found in the table >> directly. Given IOAPIC hotplug, that may not be the first ones there... > > Can you reserve a bunch of GSIs at the beginning of the GSI space, and > use rt->map[] to access them and build the EOI exit bitmap?
Ideally, userspace could give the kernel a hint where to look. It has a copy of the routing table and manages it, no? Jan -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
