On Wed, Mar 17, 2010 at 11:43:06AM +0800, Xiao Guangrong wrote: > - The RSV bit is possibility set in error code when #PF occurred > only if CR4.PSE=1 or CR4.PAE=1 > > - context->rsvd_bits_mask[1][0] is always 0 > > Changlog: > Move this operation to reset_rsvds_bits_mask() address Avi Kivity's suggestion > > Signed-off-by: Xiao Guangrong <xiaoguangr...@cn.fujitsu.com> > --- > arch/x86/kvm/mmu.c | 12 +++++++++--- > 1 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c > index b137515..c49f8ec 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -2288,18 +2288,26 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu > *vcpu, int level) > > if (!is_nx(vcpu)) > exb_bit_rsvd = rsvd_bits(63, 63); > + > + context->rsvd_bits_mask[1][0] = 0;
So if the guest enables PAT at PTE level you completly disable reserved bit checking? You should only disable checking for [1][1] if !PSE. -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
