According to SDM, we need to configure EPT paging-structure memory type
by consulting IA32_VMX_EPT_VPID_CAP.
Signed-off-by: Gui Jianfeng <guijianf...@cn.fujitsu.com>
---
arch/x86/include/asm/vmx.h | 2 ++
arch/x86/kvm/vmx.c | 12 +++++++++---
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index fb9a080..1b33a60 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -374,6 +374,8 @@ enum vmcs_field {
#define VMX_EPT_MT_EPTE_SHIFT 3
#define VMX_EPT_GAW_EPTP_SHIFT 3
#define VMX_EPT_DEFAULT_MT 0x6ull
+#define VMX_EPT_MT_WRBACK 0x6ull
+#define VMX_EPT_MT_UNCACHABLE 0x0ull
#define VMX_EPT_READABLE_MASK 0x1ull
#define VMX_EPT_WRITABLE_MASK 0x2ull
#define VMX_EPT_EXECUTABLE_MASK 0x4ull
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 06108f3..f971b9b 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1804,9 +1804,15 @@ static u64 construct_eptp(unsigned long root_hpa)
{
u64 eptp;
- /* TODO write the value reading from MSR */
- eptp = VMX_EPT_DEFAULT_MT |
- VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+ if (cpu_has_vmx_eptp_writeback())
+ eptp = VMX_EPT_MT_WRBACK |
+ VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+ else if (cpu_has_vmx_eptp_uncacheable())
+ eptp = VMX_EPT_MT_UNCACHABLE |
+ VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+ else
+ BUG();
+
eptp |= (root_hpa & PAGE_MASK);
return eptp;
--
1.6.5.2
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