Hi Avi,

Thanks for your comments.

Avi Kivity wrote:

> Later we have:
> 
>>         kvm_x86_ops->set_cr4(vcpu, cr4);
>>         vcpu->arch.cr4 = cr4;
>>         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) &&
>> !tdp_enabled;
> 
> All of which depend on cr4.

Oh, destroy_kvm_mmu() is not really destroyed cr3 and we can reload it later
form shadow page cache, so, maybe this patch is unnecessary.

But, i have a another question here, why we need encode 'cr4 & X86_CR4_PGE' into
base_role.cr4_gpe? Why we need allocation different shadow page for global page
and no-global page?

As i know, global page is not static in TLB, and x86 cpu also may flush them 
form TLB,
maybe we no need treat global page specially... Am i miss something? :-(

Xiao

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