On 05/12/2010 11:40 AM, Sheng Yang wrote:
Only modifying some bits of CR0/CR4 needs paging mode switch.

Modify EFER.NXE bit would result in reserved bit updates.

Signed-off-by: Sheng Yang<sh...@linux.intel.com>
---
  arch/x86/kvm/x86.c |   16 ++++++++++++++--
  1 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 764f89b..f442da2 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -416,6 +416,10 @@ out:

  static int __kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  {
+       unsigned long old_cr0 = kvm_read_cr0(vcpu);
+       unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
+                                   X86_CR0_CD | X86_CR0_NW;
+

CR0_WP...

--
Do not meddle in the internals of kernels, for they are subtle and quick to 
panic.

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