This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
consistent with ioapic_mmio_read, which also allows byte and word accesses.

Signed-off-by: Julian Stecklina <j...@alien8.de>
---
 virt/kvm/ioapic.c |   17 +++++++++++++----
 1 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
index 3eed61e..e94ef6ba 100644
--- a/virt/kvm/ioapic.c
+++ b/virt/kvm/ioapic.c
@@ -332,9 +332,18 @@ static int ioapic_mmio_write(struct kvm_io_device *this, 
gpa_t addr, int len,
                     (void*)addr, len, val);
        ASSERT(!(addr & 0xf));  /* check alignment */
 
-       if (len == 4 || len == 8)
-               data = *(u32 *) val;
-       else {
+        switch (len) {
+        case 8:
+        case 4:
+                data = *(u32 *) val;
+                break;
+        case 2:
+                data = *(u16 *) val;
+                break;
+        case 1:
+                data = *(u8  *) val;
+                break;
+        default:
                printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
                return 0;
        }
@@ -343,7 +352,7 @@ static int ioapic_mmio_write(struct kvm_io_device *this, 
gpa_t addr, int len,
        spin_lock(&ioapic->lock);
        switch (addr) {
        case IOAPIC_REG_SELECT:
-               ioapic->ioregsel = data;
+               ioapic->ioregsel = data & 0xFF; /* 8-bit register */
                break;
 
        case IOAPIC_REG_WINDOW:
-- 
1.7.7.3


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