On Wed, 23 Nov 2011 11:38:40 +0200, Sasha Levin <levinsasha...@gmail.com> wrote:
> On Wed, 2011-11-23 at 10:49 +0200, Michael S. Tsirkin wrote:
> > On Wed, Nov 23, 2011 at 01:02:22PM +1030, Rusty Russell wrote:
> > > +/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
> > > +struct virtio_pci_common_cfg {
> > > + /* About the whole device. */
> > > + __u64 device_features; /* read-only */
> > > + __u64 guest_features; /* read-write */
> >
> > We currently require atomic accesses to common fields.
> > Some architectures might not have such for 64 bit,
> > so these need to be split I think ...
>
> We can consider stealing the feature implementation from virtio-mmio:
> Use the first 32 bits as a selector and the last as the features
> themselves.
>
> It's more complex to work with, but it provides 2**32 32 feature bits
> (which should be enough for a while) and it solves the atomic access
> issue.
That works. I don't expect we'll need more than 64 features given that
virtio_net hasn't seen a new one in over a year, but it's gone from 5 to
18 in 4 years, so another 32 bits at that rate only gets us another decade.
Unfortunately, it doesn't solve the queue_address problem.
We currently multiply the (32-bit) address by 4096 (the alignment). If
drivers are going to reduce alignment, that makes it trickier, hence the
change here to a 64. Simplicity.
We could cheat and assert that a 32-bit write there implies 0 in the
upper bits, and hope that all 64 bit platforms can do a 64-bit atomic
write. Or insist the value not be intepreted until the guest writes its
(first) feature bit.
Perhaps we really need a "I'm done configuring!" trigger, now we can't
use the feature bit field for that.
Thoughts welcome...
Rusty.
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