GNU make defaults "$(CC)" to "cc", which breaks compilation when we try to execute $(CROSS_COMPILE)-cc.
This patch copies what the top-level kernel Makefile does, by specifying "gcc" directly when overriding the $CC environment variable. Signed-off-by: Will Deacon <will.dea...@arm.com> --- tools/kvm/Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/kvm/Makefile b/tools/kvm/Makefile index 44a55c2..bb22587 100644 --- a/tools/kvm/Makefile +++ b/tools/kvm/Makefile @@ -19,8 +19,8 @@ export E Q KINCL_PATH include config/utilities.mak include config/feature-tests.mak -CC := $(CROSS_COMPILE)$(CC) -LD := $(CROSS_COMPILE)$(LD) +CC := $(CROSS_COMPILE)gcc +LD := $(CROSS_COMPILE)ld FIND := find CSCOPE := cscope -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
