On Nov 1, 2012, at 11:18 AM, Avi Kivity wrote:
>> +
>> + /* Set the appropriate status bits based on host CPU features, before
>> we hit the scheduler */
>> + kvm_mips_set_c0_status();
>> +
>> + local_irq_enable();
>
> Ah, so you handle exits with interrupts enabled. But that's not how we
> usually do it; the standard pattern is
>
>
> while (can continue)
> disable interrupts
> enter guest
> enable interrupts
> process exit
A bit more detail here. KVM/MIPS has its own set of exception handlers which
are separate from the host kernel's handlers. We switch between the 2 sets of
handlers by setting the Exception Base Register (EBASE). We enable host
interrupts just before we switch to guest context so that we trap when the host
gets a timer or I/O interrupt.
When an exception does occur in guest context, the KVM/MIPS handlers will save
the guest context, and switch back to the default host kernel exception
handlers. We enter the "C" handler (kvm_mips_handle_exit()) with interrupts
disabled, and explicitly enable them there. This allows the host kernel to
handle any pending interrupts.
The sequence is as follows
while (can continue)
disable interrupts
trampoline code to save host kernel context, load guest context
enable host interrupts
enter guest context
KVM/MIPS trap handler (called with interrupts disabled, per MIPS
architecture)
Restore host Linux context, setup stack to handle exception
Jump to "C" handler
Enable interrupts before handling VM exit.
Regards
Sanjay
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