Thanks Marcelo! > -----Original Message----- > From: Marcelo Tosatti [mailto:mtosa...@redhat.com] > Sent: Friday, November 30, 2012 12:40 PM > To: Auld, Will > Cc: qemu-devel; Gleb; Andreas Farber; kvm@vger.kernel.org; Dugger, > Donald D; Liu, Jinsong; Zhang, Xiantao; a...@redhat.com > Subject: Re: [PATCH V5] target-i386: Enabling IA32_TSC_ADJUST for QEMU > KVM guest VMs > > On Mon, Nov 26, 2012 at 09:32:18PM -0800, Will Auld wrote: > > CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported > > > > Basic design is to emulate the MSR by allowing reads and writes to > the > > hypervisor vcpu specific locations to store the value of the emulated > MSRs. > > In this way the IA32_TSC_ADJUST value will be included in all reads > to > > the TSC MSR whether through rdmsr or rdtsc. > > > > As this is a new MSR that the guest may access and modify its value > > needs to be migrated along with the other MRSs. The changes here are > > specifically for recognizing when IA32_TSC_ADJUST is enabled in CPUID > > and code added for migrating its value. > > > > Signed-off-by: Will Auld <will.a...@intel.com> > > --- > > Andreas, > > > > Thanks, that helped. I used Stefan's auto-run method this time. > > > > Will > > > > target-i386/cpu.h | 2 ++ > > target-i386/kvm.c | 14 ++++++++++++++ > > target-i386/machine.c | 21 +++++++++++++++++++++ > > 3 files changed, 37 insertions(+) > > Applied, thanks.
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