On Thu, Dec 20, 2012 at 11:07:23AM +0800, Xudong Hao wrote:
> Enable 64 bits bar emulation.
>
> v3 changes from v2:
> - Leave original error string and drop the leading 016.
>
> v2 changes from v1:
> - Change 0lx% to 0x%016 when print a 64 bit variable.
>
> Test pass with the current seabios which already support 64bit pci bars.
>
> Signed-off-by: Xudong Hao <xudong....@intel.com>
Thanks, applied to uq/master.
> ---
> hw/kvm/pci-assign.c | 14 ++++++++++----
> 1 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/hw/kvm/pci-assign.c b/hw/kvm/pci-assign.c
> index 7a0998c..2271a2e 100644
> --- a/hw/kvm/pci-assign.c
> +++ b/hw/kvm/pci-assign.c
> @@ -46,6 +46,7 @@
> #define IORESOURCE_IRQ 0x00000400
> #define IORESOURCE_DMA 0x00000800
> #define IORESOURCE_PREFETCH 0x00002000 /* No side effects */
> +#define IORESOURCE_MEM_64 0x00100000
>
> //#define DEVICE_ASSIGNMENT_DEBUG
>
> @@ -442,9 +443,13 @@ static int assigned_dev_register_regions(PCIRegion
> *io_regions,
>
> /* handle memory io regions */
> if (cur_region->type & IORESOURCE_MEM) {
> - int t = cur_region->type & IORESOURCE_PREFETCH
> - ? PCI_BASE_ADDRESS_MEM_PREFETCH
> - : PCI_BASE_ADDRESS_SPACE_MEMORY;
> + int t = PCI_BASE_ADDRESS_SPACE_MEMORY;
> + if (cur_region->type & IORESOURCE_PREFETCH) {
> + t |= PCI_BASE_ADDRESS_MEM_PREFETCH;
> + }
> + if (cur_region->type & IORESOURCE_MEM_64) {
> + t |= PCI_BASE_ADDRESS_MEM_TYPE_64;
> + }
>
> /* map physical memory */
> pci_dev->v_addrs[i].u.r_virtbase = mmap(NULL, cur_region->size,
> @@ -632,7 +637,8 @@ again:
> rp->valid = 0;
> rp->resource_fd = -1;
> size = end - start + 1;
> - flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH;
> + flags &= IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH
> + | IORESOURCE_MEM_64;
> if (size == 0 || (flags & ~IORESOURCE_PREFETCH) == 0) {
> continue;
> }
> --
> 1.5.5
--
Gleb.
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