On Mon, Aug 19, 2013 at 08:57:58PM +0200, Paolo Bonzini wrote: > Il 19/08/2013 19:13, Marcelo Tosatti ha scritto: > > > > The configuration of the timer represented by MSR_IA32_TSCDEADLINE depends > > on: > > > > - APIC LVT Timer register. > > - TSC value. > > > > Change the order to respect the dependency. > > Do you have a testcase? > > Paolo
Autotest: python ConfigTest.py --guestname=RHEL.7 --driveformat=virtio_scsi --nicmodel=e1000 --mem=2048 --vcpu=4 --testcase=timedrift..ntp.with_migration --nrepeat=10 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
