Il 28/11/2013 10:19, Gleb Natapov ha scritto: > Not changing current behaviour is certainly safer, but I am still not 100% > convinced we have to ensure this. > > Suppose guest does: > > 1: change msi interrupt by writing to pci register > 2: read the pci register to flush the write > 3: zero idt > > I am pretty certain that this code can get interrupt after step 2 on real HW, > but I cannot tell if guest can rely on it to be delivered exactly after > read instruction or it can be delayed by couple of instructions.
I agree it's fragile, but if a dedicated SRCU can meet the requirements (possibly with synchronize_srcu_expedited), I prefer not to break it. Paolo Seems to me > it would be fragile for an OS to depend on this behaviour. AFAIK Linux does > not. -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
