Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E.

Signed-off-by: Mihai Caraman <mihai.cara...@freescale.com>
---
 arch/powerpc/include/asm/mmu-book3e.h |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/include/asm/mmu-book3e.h 
b/arch/powerpc/include/asm/mmu-book3e.h
index 936db36..2b23313 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,7 +40,10 @@
 
 /* MAS registers bit definitions */
 
-#define MAS0_TLBSEL(x)         (((x) << 28) & 0x30000000)
+#define MAS0_TLBSEL_MASK       0x30000000
+#define MAS0_TLBSEL_SHIFT      28
+#define MAS0_TLBSEL(x)         (((x) << MAS0_TLBSEL_SHIFT) & MAS0_TLBSEL_MASK)
+#define MAS0_GET_TLBSEL(mas0)  (((mas0) & MAS0_TLBSEL_MASK) >> 
MAS0_TLBSEL_SHIFT)
 #define MAS0_ESEL_MASK         0x0FFF0000
 #define MAS0_ESEL_SHIFT                16
 #define MAS0_ESEL(x)           (((x) << MAS0_ESEL_SHIFT) & MAS0_ESEL_MASK)
@@ -58,6 +61,7 @@
 #define MAS1_TSIZE_MASK                0x00000f80
 #define MAS1_TSIZE_SHIFT       7
 #define MAS1_TSIZE(x)          (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
+#define MAS1_GET_TSIZE(mas1)   (((mas1) & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT)
 
 #define MAS2_EPN               (~0xFFFUL)
 #define MAS2_X0                        0x00000040
-- 
1.7.3.4


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