On Sun, Feb 01, 2015 at 07:34:31PM +0100, Andrew Jones wrote: > Sprinkle in some more isbs after context-changing operations, > as the ARM ARM states we should. I haven't seen any problems > without them, but we should do it right. Also, *actually* set > the MAIR in asm_mmu_enable. We were reading, not writing... > Luckily this was just spotted while adding the isbs, rather > than leading to a nightmare debug session some day... > > Signed-off-by: Andrew Jones <drjo...@redhat.com> > --- > arm/cstart.S | 8 ++++++-- > lib/arm/processor.c | 1 + > 2 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arm/cstart.S b/arm/cstart.S > index da496e9eae7e0..39fac8f1e1bd8 100644 > --- a/arm/cstart.S > +++ b/arm/cstart.S > @@ -50,6 +50,7 @@ start: > .macro set_mode_stack mode, stack > add \stack, #S_FRAME_SIZE > msr cpsr_c, #(\mode | PSR_I_BIT | PSR_F_BIT) > + isb > mov sp, \stack > .endm > > @@ -70,6 +71,7 @@ exceptions_init: > set_mode_stack FIQ_MODE, r1 > > msr cpsr_cxsf, r2 @ back to svc mode > + isb > mov pc, lr > I don't think you really need those after the cpsr, but whatever.
-Christoffer _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
