Hi Eric,

On Thu, Feb 04, 2016 at 06:30:34PM +0100, Eric Auger wrote:
> Hi Edward,
> On 02/04/2016 05:53 PM, Edward Cragg wrote:
> > Hi,
> > 
> > I'm involved in planning a project for which there is a requirement for PCIe
> > passthrough in KVM on ARMv8. We have no hardware to test on at the moment.
> > 
> > I understand that virtualisation support for ARM is quite young, and it 
> > seems
> > like support is trickling in at the moment for this sort of thing.
> > 
> > Is anyone working on PCIe passthrough on ARM platforms who might be able to
> > share some insight into what would be required to support this?
> Yes I am currently working on this topic at the moment and especially on
> ARM PCIe passthrough with MSI enabled. I did not test PCIe passthrough
> with legacy INTx (MSI disabled) but this should work already with
> upstreamed QEMU and kernel.
> 
> With MSI enabled, the code is not upstreamed yet.
> 
> I have a QEMU series:
> 
> [RFC v2 0/8] KVM PCI/MSI passthrough with mach-virt
> (https://www.mail-archive.com/qemu-devel@nongnu.org/msg349574.html)
> 
> and a kernel series:
> [PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64"
>   (https://lkml.org/lkml/2016/1/26/371)
> 
> This is functional, tested on v8 AMD HW with a GICv2M (single MSI frame).
> 
> This is in an early stage, especially on kernel side since lots of
> issues still need to be addressed, especially handling proper IRQ isolation.

Thank you, this is good to know.

> What kind of MSI controller do you plan to use?

Do you mean the GIC itself? From registers, it appears to be a standard ARM
GIC, though i'm not sure exactly which one yet. However, it's stated in the
processor's datasheet that legacy interrupts aren't supported. It's one of the
newer Samsung Exynos processors.

Thanks,

Ed

> Hope this helps
> 
> Best Regards
> 
> Eric
> 
> > 
> > Thanks,
> > 
> > Ed
> > _______________________________________________
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> > kvmarm@lists.cs.columbia.edu
> > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
> > 
> 
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