From: Jintack Lim <jint...@cs.columbia.edu>

Forward ELR_EL1, SPSR_EL1 and VBAR_EL1 traps to the virtual EL2 if the
virtual HCR_EL2.NV bit is set.

This is for recursive nested virtualization.

Signed-off-by: Jintack Lim <jint...@cs.columbia.edu>
Signed-off-by: Marc Zyngier <m...@kernel.org>
---
 arch/arm64/include/asm/kvm_arm.h |  1 +
 arch/arm64/kvm/sys_regs.c        | 28 +++++++++++++++++++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 1be4667d5e3d..cdee623ce92f 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -13,6 +13,7 @@
 
 /* Hyp Configuration Register (HCR) bits */
 #define HCR_FWB                (UL(1) << 46)
+#define HCR_NV1                (UL(1) << 43)
 #define HCR_NV         (UL(1) << 42)
 #define HCR_API                (UL(1) << 41)
 #define HCR_APK                (UL(1) << 40)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 7cf5096bc11a..2ce85d5e7111 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -424,6 +424,22 @@ static bool access_wi(struct kvm_vcpu *vcpu,
        return true;
 }
 
+/* This function is to support the recursive nested virtualization */
+static bool forward_nv1_traps(struct kvm_vcpu *vcpu, struct sys_reg_params *p)
+{
+       return forward_traps(vcpu, HCR_NV1);
+}
+
+static bool access_vbar_el1(struct kvm_vcpu *vcpu,
+                           struct sys_reg_params *p,
+                           const struct sys_reg_desc *r)
+{
+       if (forward_nv1_traps(vcpu, p))
+               return false;
+
+       return access_rw(vcpu, p, r);
+}
+
 /*
  * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
  */
@@ -1647,6 +1663,7 @@ static bool access_sp_el1(struct kvm_vcpu *vcpu,
        return true;
 }
 
+
 static bool access_elr(struct kvm_vcpu *vcpu,
                       struct sys_reg_params *p,
                       const struct sys_reg_desc *r)
@@ -1654,6 +1671,9 @@ static bool access_elr(struct kvm_vcpu *vcpu,
        if (el12_reg(p) && forward_nv_traps(vcpu))
                return false;
 
+       if (!el12_reg(p) && forward_nv1_traps(vcpu, p))
+               return false;
+
        if (p->is_write)
                vcpu->arch.ctxt.gp_regs.elr_el1 = p->regval;
        else
@@ -1669,6 +1689,9 @@ static bool access_spsr(struct kvm_vcpu *vcpu,
        if (el12_reg(p) && forward_nv_traps(vcpu))
                return false;
 
+       if (!el12_reg(p) && forward_nv1_traps(vcpu, p))
+               return false;
+
        if (p->is_write)
                vcpu->arch.ctxt.gp_regs.spsr[KVM_SPSR_EL1] = p->regval;
        else
@@ -1684,6 +1707,9 @@ static bool access_spsr_el2(struct kvm_vcpu *vcpu,
        if (el12_reg(p) && forward_nv_traps(vcpu))
                return false;
 
+       if (!el12_reg(p) && forward_nv1_traps(vcpu, p))
+               return false;
+
        if (p->is_write)
                vcpu_write_sys_reg(vcpu, p->regval, SPSR_EL2);
        else
@@ -1866,7 +1892,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
        { SYS_DESC(SYS_LORC_EL1), trap_loregion },
        { SYS_DESC(SYS_LORID_EL1), trap_loregion },
 
-       { SYS_DESC(SYS_VBAR_EL1), access_rw, reset_val, VBAR_EL1, 0 },
+       { SYS_DESC(SYS_VBAR_EL1), access_vbar_el1, reset_val, VBAR_EL1, 0 },
        { SYS_DESC(SYS_DISR_EL1), NULL, reset_val, DISR_EL1, 0 },
 
        { SYS_DESC(SYS_ICC_IAR0_EL1), write_to_read_only },
-- 
2.20.1

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