On 05/19/2020 10:40 AM, Anshuman Khandual wrote:
This adds basic building blocks required for ID_MMFR5 CPU register which
provides information about the implemented memory model and memory
management support in AArch32 state. This is added per ARM DDI 0487F.a
specification.
Cc: Catalin Marinas <catalin.mari...@arm.com>
Cc: Will Deacon <w...@kernel.org>
Cc: Marc Zyngier <m...@kernel.org>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: James Morse <james.mo...@arm.com>
Cc: Suzuki K Poulose <suzuki.poul...@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker...@vger.kernel.org
Suggested-by: Will Deacon <w...@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khand...@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
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