Add the required handling for EL2 and EL02 registers, as
well as EL1 registers used in the E2H context.

Signed-off-by: Marc Zyngier <m...@kernel.org>
---
 arch/arm64/include/asm/sysreg.h |  6 +++
 arch/arm64/kvm/sys_regs.c       | 87 +++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 41c3603a3f29..ff6d3af8ed34 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -626,6 +626,12 @@
 
 #define SYS_CNTVOFF_EL2                        sys_reg(3, 4, 14, 0, 3)
 #define SYS_CNTHCTL_EL2                        sys_reg(3, 4, 14, 1, 0)
+#define SYS_CNTHP_TVAL_EL2             sys_reg(3, 4, 14, 2, 0)
+#define SYS_CNTHP_CTL_EL2              sys_reg(3, 4, 14, 2, 1)
+#define SYS_CNTHP_CVAL_EL2             sys_reg(3, 4, 14, 2, 2)
+#define SYS_CNTHV_TVAL_EL2             sys_reg(3, 4, 14, 3, 0)
+#define SYS_CNTHV_CTL_EL2              sys_reg(3, 4, 14, 3, 1)
+#define SYS_CNTHV_CVAL_EL2             sys_reg(3, 4, 14, 3, 2)
 
 /* VHE encodings for architectural EL0/1 system registers */
 #define SYS_SCTLR_EL12                 sys_reg(3, 5, 1, 0, 0)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index bbc58930a5eb..f2452e76156c 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1274,20 +1274,92 @@ static bool access_arch_timer(struct kvm_vcpu *vcpu,
 
        switch (reg) {
        case SYS_CNTP_TVAL_EL0:
+               if (vcpu_is_el2(vcpu) && vcpu_el2_e2h_is_set(vcpu))
+                       tmr = TIMER_HPTIMER;
+               else
+                       tmr = TIMER_PTIMER;
+               treg = TIMER_REG_TVAL;
+               break;
+
        case SYS_AARCH32_CNTP_TVAL:
+       case SYS_CNTP_TVAL_EL02:
                tmr = TIMER_PTIMER;
                treg = TIMER_REG_TVAL;
                break;
+
+       case SYS_CNTV_TVAL_EL02:
+               tmr = TIMER_VTIMER;
+               treg = TIMER_REG_TVAL;
+               break;
+
+       case SYS_CNTHP_TVAL_EL2:
+               tmr = TIMER_HPTIMER;
+               treg = TIMER_REG_TVAL;
+               break;
+
+       case SYS_CNTHV_TVAL_EL2:
+               tmr = TIMER_HVTIMER;
+               treg = TIMER_REG_TVAL;
+               break;
+
        case SYS_CNTP_CTL_EL0:
+               if (vcpu_is_el2(vcpu) && vcpu_el2_e2h_is_set(vcpu))
+                       tmr = TIMER_HPTIMER;
+               else
+                       tmr = TIMER_PTIMER;
+               treg = TIMER_REG_CTL;
+               break;
+
        case SYS_AARCH32_CNTP_CTL:
+       case SYS_CNTP_CTL_EL02:
                tmr = TIMER_PTIMER;
                treg = TIMER_REG_CTL;
                break;
+
+       case SYS_CNTV_CTL_EL02:
+               tmr = TIMER_VTIMER;
+               treg = TIMER_REG_CTL;
+               break;
+
+       case SYS_CNTHP_CTL_EL2:
+               tmr = TIMER_HPTIMER;
+               treg = TIMER_REG_CTL;
+               break;
+
+       case SYS_CNTHV_CTL_EL2:
+               tmr = TIMER_HVTIMER;
+               treg = TIMER_REG_CTL;
+               break;
+
        case SYS_CNTP_CVAL_EL0:
+               if (vcpu_is_el2(vcpu) && vcpu_el2_e2h_is_set(vcpu))
+                       tmr = TIMER_HPTIMER;
+               else
+                       tmr = TIMER_PTIMER;
+               treg = TIMER_REG_CVAL;
+               break;
+
        case SYS_AARCH32_CNTP_CVAL:
+       case SYS_CNTP_CVAL_EL02:
                tmr = TIMER_PTIMER;
                treg = TIMER_REG_CVAL;
                break;
+
+       case SYS_CNTV_CVAL_EL02:
+               tmr = TIMER_VTIMER;
+               treg = TIMER_REG_CVAL;
+               break;
+
+       case SYS_CNTHP_CVAL_EL2:
+               tmr = TIMER_HPTIMER;
+               treg = TIMER_REG_CVAL;
+               break;
+
+       case SYS_CNTHV_CVAL_EL2:
+               tmr = TIMER_HVTIMER;
+               treg = TIMER_REG_CVAL;
+               break;
+
        case SYS_CNTVOFF_EL2:
                tmr = TIMER_VTIMER;
                treg = TIMER_REG_VOFF;
@@ -2220,6 +2292,13 @@ static const struct sys_reg_desc sys_reg_descs[] = {
        { SYS_DESC(SYS_CNTVOFF_EL2), access_arch_timer },
        EL2_REG(CNTHCTL_EL2, access_rw, reset_val, 0),
 
+       { SYS_DESC(SYS_CNTHP_TVAL_EL2), access_arch_timer },
+       { SYS_DESC(SYS_CNTHP_CTL_EL2), access_arch_timer },
+       { SYS_DESC(SYS_CNTHP_CVAL_EL2), access_arch_timer },
+       { SYS_DESC(SYS_CNTHV_TVAL_EL2), access_arch_timer },
+       { SYS_DESC(SYS_CNTHV_CTL_EL2), access_arch_timer },
+       { SYS_DESC(SYS_CNTHV_CVAL_EL2), access_arch_timer },
+
        EL12_REG(SCTLR, access_vm_reg, reset_val, 0x00C50078),
        EL12_REG(CPACR, access_rw, reset_val, 0),
        EL12_REG(TTBR0, access_vm_reg, reset_unknown, 0),
@@ -2237,6 +2316,14 @@ static const struct sys_reg_desc sys_reg_descs[] = {
        EL12_REG(CONTEXTIDR, access_vm_reg, reset_val, 0),
        EL12_REG(CNTKCTL, access_rw, reset_val, 0),
 
+       { SYS_DESC(SYS_CNTP_TVAL_EL02), access_arch_timer },
+       { SYS_DESC(SYS_CNTP_CTL_EL02), access_arch_timer },
+       { SYS_DESC(SYS_CNTP_CVAL_EL02), access_arch_timer },
+
+       { SYS_DESC(SYS_CNTV_TVAL_EL02), access_arch_timer },
+       { SYS_DESC(SYS_CNTV_CTL_EL02), access_arch_timer },
+       { SYS_DESC(SYS_CNTV_CVAL_EL02), access_arch_timer },
+
        EL2_REG(SP_EL2, NULL, reset_unknown, 0),
 };
 
-- 
2.30.2

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