[PATCH v2 07/10] KVM: arm64: Expose the WFXT feature to guests

[Marc Zyngier]

Plumb in the capability, and expose WFxT to guests when available.

Signed-off-by: Marc Zyngier <m...@kernel.org>
---
 arch/arm64/kernel/cpufeature.c | 12 ++++++++++++
 arch/arm64/kvm/sys_regs.c      |  2 ++
 2 files changed, 14 insertions(+)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index d72c4b4d389c..db6d9ab685e5 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -237,6 +237,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
        ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
                       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_GPA3_SHIFT, 4, 
0),
        ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, 
ID_AA64ISAR2_RPRES_SHIFT, 4, 0),
+       ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, 
ID_AA64ISAR2_WFXT_SHIFT, 4, 0),
        ARM64_FTR_END,
 };
 
@@ -2442,6 +2443,17 @@ static const struct arm64_cpu_capabilities 
arm64_features[] = {
                .matches = has_cpuid_feature,
                .min_field_value = 1,
        },
+       {
+               .desc = "WFx with timeout",
+               .capability = ARM64_HAS_WFXT,
+               .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+               .sys_reg = SYS_ID_AA64ISAR2_EL1,
+               .sign = FTR_UNSIGNED,
+               .field_pos = ID_AA64ISAR2_WFXT_SHIFT,
+               .field_width = 4,
+               .matches = has_cpuid_feature,
+               .min_field_value = ID_AA64ISAR2_WFXT_SUPPORTED,
+       },
        {},
 };
 
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 7b45c040cc27..cc9a77546cc0 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1144,6 +1144,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
                if (!vcpu_has_ptrauth(vcpu))
                        val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_APA3) |
                                 ARM64_FEATURE_MASK(ID_AA64ISAR2_GPA3));
+               if (!cpus_have_final_cap(ARM64_HAS_WFXT))
+                       val &= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_WFXT);
                break;
        case SYS_ID_AA64DFR0_EL1:
                /* Limit debug to ARMv8.0 */
-- 
2.34.1

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