I am taking 40 channels of AI while simultaneously doing 3 buffered counter operations. The 40 AI channels are coming from PXI 6608's (which have plenty of onboard memory to handle the acquisitions).
The problem is that the 3 counter DMA transfers are hampered by the AI channels reading the onboard memory across the PCI bus, so I get very low bandwidth on the counters. How can I define the counter DMA transfers to have priority over the AI transfers? I want the AI data to just stay in the onboard memory until the counter DMA is finished, then transfer to the PC memory buffer. That way, the PCI bandwidth is being used where it is needed. Thanks, rgames