Added NixCore X1 ramips target http://nixcores.com. This builds 8M and 16M
images
Signed-off-by: Drew Gaylo <d...@nixcores.com>
diff --git a/target/linux/ramips/base-files/etc/board.d/02_network
b/target/linux/ramips/base-files/etc/board.d/02_network
index 4728c75..69c0125 100755
--- a/target/linux/ramips/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/base-files/etc/board.d/02_network
@@ -77,6 +77,7 @@ ramips_setup_interfaces()
mt7628|\
mzk-750dhp|\
mzk-w300nh2|\
+ nixcore|\
oy-0001|\
pbr-m1|\
psg1208|\
diff --git a/target/linux/ramips/base-files/lib/ramips.sh
b/target/linux/ramips/base-files/lib/ramips.sh
index cbe455d..76f0e43 100755
--- a/target/linux/ramips/base-files/lib/ramips.sh
+++ b/target/linux/ramips/base-files/lib/ramips.sh
@@ -316,6 +316,9 @@ ramips_board_detect() {
*"NCS601W")
name="ncs601w"
;;
+ *"NixcoreX1")
+ name="nixcore-x1"
+ ;;
*"NW718")
name="nw718"
;;
diff --git a/target/linux/ramips/base-files/lib/upgrade/platform.sh
b/target/linux/ramips/base-files/lib/upgrade/platform.sh
index 91c9997..0094568 100755
--- a/target/linux/ramips/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ramips/base-files/lib/upgrade/platform.sh
@@ -94,6 +94,7 @@ platform_check_image() {
mzk-w300nh2|\
mzk-wdpr|\
nbg-419n|\
+ nixcore|\
nw718|\
oy-0001|\
pbr-m1|\
diff --git a/target/linux/ramips/dts/NIXCOREX1-16M.dts
b/target/linux/ramips/dts/NIXCOREX1-16M.dts
new file mode 100644
index 0000000..c7ec410
--- /dev/null
+++ b/target/linux/ramips/dts/NIXCOREX1-16M.dts
@@ -0,0 +1,186 @@
+/dts-v1/;
+
+/include/ "rt5350.dtsi"
+
+/ {
+ compatible = "NixcoreX1", "ralink,rt5350-soc";
+ model = "NixcoreX1";
+
+ palmbus@10000000 {
+ /* Re-enable the gpio1 ports */
+ gpio1: gpio@660 {
+ status = "okay";
+ };
+
+ i2c@900 {
+ status = "okay";
+ };
+ uart@500 {
+ status = "okay";
+ /* Mix of uart and gpio */
+ reset-names = "gpio uartf";
+ };
+ spi@b00 {
+ status = "okay";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "s25fl064k";
+ reg = <0>;
+ linux,modalias = "m25p80", "s25fl064k";
+ spi-max-frequency = <10000000>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "uboot-env";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ factory: partition@40000 {
+ label = "factory";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
+
+ partition@50000 {
+ label = "firmware";
+ reg = <0x50000 0x7b0000>;
+ };
+ };
+
+ spidev@1 {
+ compatible = "linux,spidev";
+ spi-max-frequency = <10000000>;
+ reg = <1>;
+ };
+ };
+ };
+
+ pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ /* Associate the tjag, uartf and led groups with gpio */
+ ralink,group = "jtag", "led", "spi_cs1";
+ /* How do we set individual pins? */
+ ralink,function = "gpio";
+ };
+ };
+ };
+
+ ethernet@10100000 {
+ mtd-mac-address = <&factory 0x4>;
+ };
+
+ esw@10110000 {
+ ralink,portmap = <0x17>;
+ };
+
+ wmac@10180000 {
+ ralink,mtd-eeprom = <&factory 0>;
+ };
+
+ ehci@101c0000 {
+ status = "okay";
+ };
+
+ ohci@101c1000 {
+ status = "okay";
+ };
+
+ chosen {
+ bootargs = "console=ttyS1,57600";
+ };
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ gpio0 {
+ gpio-export,name = "gpio0";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 0 0>;
+ };
+
+ /* GPIOs 1-6 are I2C,SPI */
+
+ /* GPIO 7-14 are uart1 */
+
+ /* GPIOs 15 & 16 are uart2 */
+
+ /* JTAG */
+ gpio17 {
+ /* JTAG_TDO */
+ gpio-export,name = "gpio17";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 17 0>;
+ };
+ gpio18 {
+ /* JTAG_TDI */
+ gpio-export,name = "gpio18";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 18 0>;
+ };
+ gpio19 {
+ /* JTAG_TMS */
+ gpio-export,name = "gpio19";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 19 0>;
+ };
+ gpio20 {
+ /* JTAG_TCLK */
+ gpio-export,name = "gpio20";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 20 0>;
+ };
+ gpio21 {
+ /* JTAG_TRST_N */
+ gpio-export,name = "gpio21";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 21 0>;
+ };
+
+ /* ETH LEDs */
+ /*
+ gpio22 {
+ gpio-export,name = "gpio22";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 0 0>;
+ };
+ gpio23 {
+ gpio-export,name = "gpio23";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 1 0>;
+ };
+ gpio24 {
+ gpio-export,name = "gpio24";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 2 0>;
+ };
+ gpio25 {
+ gpio-export,name = "gpio25";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 3 0>;
+ };
+ */
+ gpio26 {
+ /* ETH4_LED */
+ gpio-export,name = "gpio26";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 4 0>;
+ };
+
+ gpio27 {
+ /* spi_cs1 */
+ gpio-export,name = "gpio27";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 5 0>;
+ };
+ };
+
+};
diff --git a/target/linux/ramips/dts/NIXCOREX1-8M.dts
b/target/linux/ramips/dts/NIXCOREX1-8M.dts
new file mode 100644
index 0000000..c7ec410
--- /dev/null
+++ b/target/linux/ramips/dts/NIXCOREX1-8M.dts
@@ -0,0 +1,186 @@
+/dts-v1/;
+
+/include/ "rt5350.dtsi"
+
+/ {
+ compatible = "NixcoreX1", "ralink,rt5350-soc";
+ model = "NixcoreX1";
+
+ palmbus@10000000 {
+ /* Re-enable the gpio1 ports */
+ gpio1: gpio@660 {
+ status = "okay";
+ };
+
+ i2c@900 {
+ status = "okay";
+ };
+ uart@500 {
+ status = "okay";
+ /* Mix of uart and gpio */
+ reset-names = "gpio uartf";
+ };
+ spi@b00 {
+ status = "okay";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "s25fl064k";
+ reg = <0>;
+ linux,modalias = "m25p80", "s25fl064k";
+ spi-max-frequency = <10000000>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "uboot-env";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ factory: partition@40000 {
+ label = "factory";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
+
+ partition@50000 {
+ label = "firmware";
+ reg = <0x50000 0x7b0000>;
+ };
+ };
+
+ spidev@1 {
+ compatible = "linux,spidev";
+ spi-max-frequency = <10000000>;
+ reg = <1>;
+ };
+ };
+ };
+
+ pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ /* Associate the tjag, uartf and led groups with gpio */
+ ralink,group = "jtag", "led", "spi_cs1";
+ /* How do we set individual pins? */
+ ralink,function = "gpio";
+ };
+ };
+ };
+
+ ethernet@10100000 {
+ mtd-mac-address = <&factory 0x4>;
+ };
+
+ esw@10110000 {
+ ralink,portmap = <0x17>;
+ };
+
+ wmac@10180000 {
+ ralink,mtd-eeprom = <&factory 0>;
+ };
+
+ ehci@101c0000 {
+ status = "okay";
+ };
+
+ ohci@101c1000 {
+ status = "okay";
+ };
+
+ chosen {
+ bootargs = "console=ttyS1,57600";
+ };
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ gpio0 {
+ gpio-export,name = "gpio0";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 0 0>;
+ };
+
+ /* GPIOs 1-6 are I2C,SPI */
+
+ /* GPIO 7-14 are uart1 */
+
+ /* GPIOs 15 & 16 are uart2 */
+
+ /* JTAG */
+ gpio17 {
+ /* JTAG_TDO */
+ gpio-export,name = "gpio17";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 17 0>;
+ };
+ gpio18 {
+ /* JTAG_TDI */
+ gpio-export,name = "gpio18";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 18 0>;
+ };
+ gpio19 {
+ /* JTAG_TMS */
+ gpio-export,name = "gpio19";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 19 0>;
+ };
+ gpio20 {
+ /* JTAG_TCLK */
+ gpio-export,name = "gpio20";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 20 0>;
+ };
+ gpio21 {
+ /* JTAG_TRST_N */
+ gpio-export,name = "gpio21";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio0 21 0>;
+ };
+
+ /* ETH LEDs */
+ /*
+ gpio22 {
+ gpio-export,name = "gpio22";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 0 0>;
+ };
+ gpio23 {
+ gpio-export,name = "gpio23";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 1 0>;
+ };
+ gpio24 {
+ gpio-export,name = "gpio24";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 2 0>;
+ };
+ gpio25 {
+ gpio-export,name = "gpio25";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 3 0>;
+ };
+ */
+ gpio26 {
+ /* ETH4_LED */
+ gpio-export,name = "gpio26";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 4 0>;
+ };
+
+ gpio27 {
+ /* spi_cs1 */
+ gpio-export,name = "gpio27";
+ gpio-export,direction_may_change = <1>;
+ gpios = <&gpio1 5 0>;
+ };
+ };
+
+};
diff --git a/target/linux/ramips/image/rt305x.mk
b/target/linux/ramips/image/rt305x.mk
index da7fc46..db12a8e 100644
--- a/target/linux/ramips/image/rt305x.mk
+++ b/target/linux/ramips/image/rt305x.mk
@@ -100,6 +100,21 @@ define BuildFirmware/HLKRM04/initramfs
mkhilinkfw -e -i$(call imgname,$(1),$(2))-uImage.bin -o $(call
imgname,$(1),$(2))-factory.bin;
endef
+# This is called to build the nixcore image. Build both 8MB and 16MB
+nixcore_8mb_mtd_size=8060928
+nixcore_16mb_mtd_size=16449536
+define BuildFirmware/NIXCOREX1/squashfs
+# Args are XXX, nixcore-mM and NIXCOREX1-xM
+ $(call
BuildFirmware/CustomFlash/$(1),$(1),$(2)-8M,$(3)-8M,$(nixcore_8mb_mtd_size))
+ $(call
BuildFirmware/CustomFlash/$(1),$(1),$(2)-16M,$(3)-16M,$(nixcore_16mb_mtd_size))
+ # Can do somethings here after the build?
+endef
+define BuildFirmware/NIXCOREX1/initramfs
+# Args are XXXX, nixcore-mM and NIXCOREX1-xM
+ $(call BuildFirmware/OF/initramfs,$(1),$(2)-8M,$(3)-8M)
+ $(call BuildFirmware/OF/initramfs,$(1),$(2)-16M,$(3)-16M)
+endef
+
vocore_8mb_mtd_size=8060928
vocore_16mb_mtd_size=16449536
define BuildFirmware/VOCORE/squashfs
@@ -257,6 +272,7 @@ Image/Build/Profile/NBG-419N=$(call
BuildFirmware/Default4M/$(1),$(1),nbg-419n,N
Image/Build/Profile/MZKW300NH2=$(call
BuildFirmware/Edimax/$(1),$(1),mzk-w300nh2,MZK-W300NH2,$(mzkw300nh2_mtd_size),CSYS,RN52,0x50000,0xc0000)
Image/Build/Profile/MZKWDPR=$(call
BuildFirmware/Default8M/$(1),$(1),mzk-wdpr,MZK-WDPR)
Image/Build/Profile/NCS601W=$(call
BuildFirmware/Default8M/$(1),$(1),ncs601W,NCS601W)
+Image/Build/Profile/NIXCOREX1=$(call
BuildFirmware/NIXCOREX1/$(1),$(1),nixcorex1,NIXCOREX1)
nw718_mtd_size=3801088
Image/Build/Profile/NW718=$(call
BuildFirmware/CustomFlashFactory/$(1),$(1),nw718m,NW718,$(nw718_mtd_size),ARA1B4NCRNW718;1,factory)
Image/Build/Profile/M2M=$(call
BuildFirmware/Default8M/$(1),$(1),m2m,M2M,Linux Kernel Image)
@@ -353,6 +369,7 @@ define Image/Build/Profile/Default
$(call Image/Build/Profile/MZKWDPR,$(1))
$(call Image/Build/Profile/NBG-419N,$(1))
$(call Image/Build/Profile/NCS601W,$(1))
+ $(call Image/Build/Profile/NIXCOREX1,$(1))
$(call Image/Build/Profile/NW718,$(1))
$(call Image/Build/Profile/MINIEMBWIFI,$(1))
$(call Image/Build/Profile/MINIEMBPLUG,$(1))
diff --git a/target/linux/ramips/rt305x/profiles/nixcore.mk
b/target/linux/ramips/rt305x/profiles/nixcore.mk
new file mode 100644
index 0000000..22dee9b
--- /dev/null
+++ b/target/linux/ramips/rt305x/profiles/nixcore.mk
@@ -0,0 +1,20 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/NIXCOREX1
+ NAME:=NixcoreX1
+ PACKAGES:=\
+ kmod-usb-core kmod-usb-ohci kmod-usb2 \
+ kmod-i2c-core kmod-i2c-ralink \
+ kmod-spi-dev
+endef
+
+define Profile/NIXCOREX1/Description
+ Package set for Nixcore X1 board
+endef
+
+$(eval $(call Profile,NIXCOREX1))
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