This allows emulated_edge_mc_sse() and gmc_sse() to be used under
AV_CPU_FLAG_SSE.
---
 libavcodec/x86/dsputil_mmx.c    |    8 ++++----
 libavcodec/x86/dsputil_yasm.asm |    6 +++---
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/libavcodec/x86/dsputil_mmx.c b/libavcodec/x86/dsputil_mmx.c
index dd6cbf5..be0ac2e 100644
--- a/libavcodec/x86/dsputil_mmx.c
+++ b/libavcodec/x86/dsputil_mmx.c
@@ -2868,6 +2868,10 @@ void dsputil_init_mmx(DSPContext* c, AVCodecContext 
*avctx)
             c->vector_clipf = vector_clipf_sse;
 #if HAVE_YASM
             c->scalarproduct_float = ff_scalarproduct_float_sse;
+
+            if (!high_bit_depth)
+                c->emulated_edge_mc = emulated_edge_mc_sse;
+            c->gmc = gmc_sse;
 #endif
         }
         if (HAVE_AMD3DNOW && (mm_flags & AV_CPU_FLAG_3DNOW))
@@ -2888,10 +2892,6 @@ void dsputil_init_mmx(DSPContext* c, AVCodecContext 
*avctx)
                     c->apply_window_int16 = ff_apply_window_int16_sse2;
                 }
             }
-
-            if (!high_bit_depth)
-            c->emulated_edge_mc = emulated_edge_mc_sse;
-            c->gmc= gmc_sse;
 #endif
         }
         if (mm_flags & AV_CPU_FLAG_SSSE3) {
diff --git a/libavcodec/x86/dsputil_yasm.asm b/libavcodec/x86/dsputil_yasm.asm
index 8e3cbdc..e7431be 100644
--- a/libavcodec/x86/dsputil_yasm.asm
+++ b/libavcodec/x86/dsputil_yasm.asm
@@ -637,7 +637,7 @@ cglobal emu_edge_core_%1, 2, 7, 0
 
 %ifnidn %3, mmx
 %rep %2/16
-    movdqu xmm %+ %%sxidx, [r1+%%src_off]
+    movups xmm %+ %%sxidx, [r1+%%src_off]
 %assign %%src_off %%src_off+16
 %assign %%sxidx   %%sxidx+1
 %endrep ; %2/16
@@ -686,7 +686,7 @@ cglobal emu_edge_core_%1, 2, 7, 0
 
 %ifnidn %3, mmx
 %rep %2/16
-    movdqu [r0+%%dst_off], xmm %+ %%dxidx
+    movups [r0+%%dst_off], xmm %+ %%dxidx
 %assign %%dst_off %%dst_off+16
 %assign %%dxidx   %%dxidx+1
 %endrep ; %2/16
@@ -915,7 +915,7 @@ ALIGN 64
 %define linesize r2m
     V_COPY_NPX %1,  mm0, movq,    8, 0xFFFFFFF8
 %else ; !mmx
-    V_COPY_NPX %1, xmm0, movdqu, 16, 0xFFFFFFF0
+    V_COPY_NPX %1, xmm0, movups, 16, 0xFFFFFFF0
 %ifdef ARCH_X86_64
 %define linesize r2
     V_COPY_NPX %1, rax , mov,     8
-- 
1.7.1

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