>>>>> "Joachim" == Joachim Schambach <[email protected]> writes:
Joachim> I might have found the problem after all. It is not the
Joachim> setting of the BITBANG mode that messes up the FPGA, but the
Joachim> reset to FIFO mode. When I just leave the second interface in
Joachim> BITBANG mode and simply close it after setting all necessary
Joachim> bits, everything works. Thanks for everyone's help on this....
Can you try to sleep a little before you reset the device? It takes some
time until the write-FIFO is writen to the external device. If the write
fifo is not empty when resetting/closing the device, strange things may
happen.
Bye
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Uwe Bonnes [email protected]
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
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