From: Zhao Yakui <yakui.z...@intel.com> v1: combine the Haswell and Gen7/6 patch together
Currently it uses the fixed policy to construct encoding command buffer. (Use CPU or GPU). And it is statically compiled. But sometimes it needs to choose the different mechanism on the fly instead of statically compiled mode. Signed-off-by: Zhao Yakui <yakui.z...@intel.com> Signed-off-by: pjl <cecilia.p...@intel.com> Signed-off-by: Pengfei Qu <pengfei...@intel.com> --- src/gen6_mfc.c | 12 ++++-------- src/gen6_mfc.h | 1 - src/gen75_mfc.c | 15 +++++---------- src/i965_encoder.h | 1 + 4 files changed, 10 insertions(+), 19 deletions(-) diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c index acefc97..0208ddb 100644 --- a/src/gen6_mfc.c +++ b/src/gen6_mfc.c @@ -676,7 +676,6 @@ gen6_mfc_stop(VADriverContextP ctx, return VA_STATUS_SUCCESS; } -#if __SOFTWARE__ static int gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, int qp,unsigned int *msg, @@ -899,7 +898,6 @@ gen6_mfc_avc_software_batchbuffer(VADriverContextP ctx, return batch_bo; } -#else static void gen6_mfc_batchbuffer_surfaces_input(VADriverContextP ctx, @@ -1299,7 +1297,6 @@ gen6_mfc_avc_hardware_batchbuffer(VADriverContextP ctx, return mfc_context->mfc_batchbuffer_surface.bo; } -#endif static void @@ -1316,11 +1313,10 @@ gen6_mfc_avc_pipeline_programing(VADriverContextP ctx, return; } -#if __SOFTWARE__ - slice_batch_bo = gen6_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); -#else - slice_batch_bo = gen6_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); -#endif + if (encoder_context->soft_batch_force) + slice_batch_bo = gen6_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); + else + slice_batch_bo = gen6_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); // begin programing intel_batchbuffer_start_atomic_bcs(batch, 0x4000); diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h index 087c676..fa610d4 100644 --- a/src/gen6_mfc.h +++ b/src/gen6_mfc.h @@ -50,7 +50,6 @@ struct encode_state; /* the space required for slice tail. */ #define SLICE_TAIL 16 -#define __SOFTWARE__ 0 #define MFC_BATCHBUFFER_AVC_INTRA 0 #define MFC_BATCHBUFFER_AVC_INTER 1 diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c index b6b18ea..bdce652 100644 --- a/src/gen75_mfc.c +++ b/src/gen75_mfc.c @@ -49,8 +49,6 @@ #define AVC_INTER_MV_OFFSET 48 #define AVC_RDO_MASK 0xFFFF -#define MFC_SOFTWARE_HASWELL 0 - #define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) #define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) @@ -995,7 +993,6 @@ gen75_mfc_avc_slice_state(VADriverContextP ctx, } -#if MFC_SOFTWARE_HASWELL static int gen75_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, @@ -1275,7 +1272,6 @@ gen75_mfc_avc_software_batchbuffer(VADriverContextP ctx, return batch_bo; } -#else static void gen75_mfc_batchbuffer_surfaces_input(VADriverContextP ctx, @@ -1636,7 +1632,6 @@ gen75_mfc_avc_hardware_batchbuffer(VADriverContextP ctx, return mfc_context->aux_batchbuffer_surface.bo; } -#endif static void gen75_mfc_avc_pipeline_programing(VADriverContextP ctx, @@ -1652,11 +1647,11 @@ gen75_mfc_avc_pipeline_programing(VADriverContextP ctx, return; } -#if MFC_SOFTWARE_HASWELL - slice_batch_bo = gen75_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); -#else - slice_batch_bo = gen75_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); -#endif + + if (encoder_context->soft_batch_force) + slice_batch_bo = gen75_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); + else + slice_batch_bo = gen75_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); // begin programing intel_batchbuffer_start_atomic_bcs(batch, 0x4000); diff --git a/src/i965_encoder.h b/src/i965_encoder.h index ddfcf9f..94d84b5 100644 --- a/src/i965_encoder.h +++ b/src/i965_encoder.h @@ -65,6 +65,7 @@ struct intel_encoder_context unsigned int is_tmp_id:1; unsigned int low_power_mode:1; + unsigned int soft_batch_force:1; void (*vme_context_destroy)(void *vme_context); VAStatus (*vme_pipeline)(VADriverContextP ctx, -- 2.7.4 _______________________________________________ Libva mailing list Libva@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/libva