On 01/24/2017 12:36 PM, Pengfei Qu wrote:
Signed-off-by: Pengfei Qu<pengfei...@intel.com>
Reviewed-by: Sean V Kelley<sea...@posteo.de>
---
;
+
+struct mbenc_param{
+ uint32_t frame_width_in_mb;
+ uint32_t frame_height_in_mb;
+ uint32_t mbenc_i_frame_dist_in_use;
+ uint32_t mad_enable;
+ uint32_t roi_enabled;
+ uint32_t brc_enabled;
+ uint32_t slice_height;
+ uint32_t mb_const_data_buffer_in_use;
+ uint32_t mb_qp_buffer_in_use;
+ uint32_t mb_vproc_stats_enable;
+};
+
+struct gen9_surface_avc
+{
+ VADriverContextP ctx;
+ VASurfaceID scaled_4x_surface_id;
+ struct object_surface *scaled_4x_surface_obj;
+ VASurfaceID scaled_16x_surface_id;
+ struct object_surface *scaled_16x_surface_obj;
+ VASurfaceID scaled_32x_surface_id;
+ struct object_surface *scaled_32x_surface_obj;
+
+ //mv code and mv data
+ struct i965_gpe_resource res_mb_code_surface;
+ struct i965_gpe_resource res_mv_data_surface;
+
+ struct i965_gpe_resource res_ref_pic_select_surface;
+ //dmv top/bottom
+ dri_bo *dmv_top;
+ dri_bo *dmv_bottom;
+
+ int dmv_bottom_flag;
+ int frame_store_id;
+ int frame_idx;
+ int is_as_ref;
+ unsigned int qp_value;
+ int top_field_order_cnt;
+};
+
+typedef struct _gen9_avc_encoder_kernel_header {
+ int nKernelCount;
+
+ // Quality mode for Frame/Field
+ kernel_header mbenc_quality_I;
+ kernel_header mbenc_quality_P;
+ kernel_header mbenc_quality_B;
+ // Normal mode for Frame/Field
+ kernel_header mbenc_normal_I;
+ kernel_header mbenc_normal_P;
+ kernel_header mbenc_normal_B;
+ // Performance modes for Frame/Field
+ kernel_header mbenc_performance_I;
+ kernel_header mbenc_performance_P;
+ kernel_header mbenc_performance_B;
+ // WiDi modes for Frame/Field
Is it supported? If it is not planned, please remove it.
+ kernel_header mbenc_widi_I;
+ kernel_header mbenc_widi_P;
+ kernel_header mbenc_widi_B;
+
+ // HME
+ kernel_header me_p;
+ kernel_header me_b;
+
+ // DownScaling
+ kernel_header ply_dscale_ply;
+ kernel_header ply_dscale_2f_ply_2f;
+
+ // BRC Init frame
+ kernel_header frame_brc_init;
+
+ // FrameBRC Update
+ kernel_header frame_brc_update;
+
+ // BRC Reset frame
+ kernel_header frame_brc_reset;
+
+ // BRC I Frame Distortion
+ kernel_header frame_brc_i_dist;
+
+ // BRCBlockCopy
+ kernel_header brc_block_copy;
+
+ // MbBRC Update
+ kernel_header mb_brc_update;
+
+ // 2x DownScaling
+ kernel_header ply_2xdscale_ply;
+ kernel_header ply_2xdscale_2f_ply_2f;
+
+ //Motion estimation kernel for the VDENC StreamIN
+ kernel_header me_vdenc;
VDENC is not handled in this patch. Please remove it.
+
+ //Weighted Prediction Kernel
+ kernel_header wp;
+
+ // Static frame detection Kernel
+ kernel_header static_detection;
+} gen9_avc_encoder_kernel_header;
+
+
+
+common structure and define
+*/
+struct gen9_avc_encoder_context {
+
+ VADriverContextP ctx;
+
+ /* VME resource */
+ //mbbrc/brc:inti/reset/update
inti? Typo?
+ struct i965_gpe_resource res_brc_history_buffer;
+ struct i965_gpe_resource res_brc_dist_data_surface;
+ //brc:update
+ struct i965_gpe_resource res_brc_pre_pak_statistics_output_buffer;
+ struct i965_gpe_resource res_brc_image_state_read_buffer;
+ struct i965_gpe_resource res_brc_image_state_write_buffer;
+ struct i965_gpe_resource res_brc_mbenc_curbe_read_buffer;
+ struct i965_gpe_resource res_brc_mbenc_curbe_write_buffer;
+ struct i965_gpe_resource res_brc_const_data_buffer;
+ //brc and mbbrc
+ struct i965_gpe_resource res_mb_status_buffer;
+ //mbbrc
+ struct i965_gpe_resource res_mbbrc_mb_qp_data_surface;
+ struct i965_gpe_resource res_mbbrc_roi_surface;
+ struct i965_gpe_resource res_mbbrc_const_data_buffer;
+
+ //mbenc
+ struct i965_gpe_resource res_mbenc_slice_map_surface;
+
+ //scaling flatness check surface
+ struct i965_gpe_resource res_flatness_check_surface;
+ //me
+ struct i965_gpe_resource s4x_memv_min_distortion_brc_buffer;
+ struct i965_gpe_resource s4x_memv_distortion_buffer;
+ struct i965_gpe_resource s4x_memv_data_buffer;
+ struct i965_gpe_resource s16x_memv_data_buffer;
+ struct i965_gpe_resource s32x_memv_data_buffer;
+
+
+ struct i965_gpe_resource res_image_state_batch_buffer_2nd_level;
+ struct intel_batchbuffer *pres_slice_batch_buffer_2nd_level;
+ // mb code/data or indrirect mv data, define in private avc surface
+
+ //sfd
+ struct i965_gpe_resource res_sfd_output_buffer;
+ struct i965_gpe_resource res_sfd_cost_table_p_frame_buffer;
+ struct i965_gpe_resource res_sfd_cost_table_b_frame_buffer;
+
+ //external mb qp data,application input
+ struct i965_gpe_resource res_mb_qp_data_surface;
+
+ struct i965_gpe_resource res_mad_data_buffer;
+
+ //wp
+ VASurfaceID wp_output_pic_select_surface_id[2];
+ struct object_surface *wp_output_pic_select_surface_obj[2];
+ struct i965_gpe_resource res_wp_output_pic_select_surface_list[2];
+
+ //mb disable skip
+ struct i965_gpe_resource res_mb_disable_skip_map_surface;
+
+ /* PAK resource */
+ //internal
+ struct i965_gpe_resource res_intra_row_store_scratch_buffer;
+ struct i965_gpe_resource res_deblocking_filter_row_store_scratch_buffer;
+ struct i965_gpe_resource res_deblocking_filter_tile_col_buffer;
+ struct i965_gpe_resource res_bsd_mpc_row_store_scratch_buffer;
+ struct i965_gpe_resource res_mfc_indirect_bse_object;
+ struct i965_gpe_resource res_pak_mb_status_buffer;
+ struct i965_gpe_resource
res_direct_mv_buffersr[NUM_MFC_AVC_DMV_BUFFERS];//INTERNAL: 0-31 as input,32
and 33 as output
+
+ //output
+ struct i965_gpe_resource res_post_deblocking_output;
+ struct i965_gpe_resource res_pre_deblocking_output;
+
+ //ref list
+ struct i965_gpe_resource
list_reference_res[MAX_MFC_AVC_REFERENCE_SURFACES];
+
+ // kernel context
+ struct gen9_avc_scaling_context context_scaling;
+ struct gen9_avc_me_context context_me;
+ struct gen9_avc_brc_context context_brc;
+ struct gen9_avc_mbenc_context context_mbenc;
+ struct gen9_avc_wp_context context_wp;
+ struct gen9_avc_sfd_context context_sfd;
+
+ struct encoder_status_buffer_internal status_buffer;
+
+};
+
+#define MAX_AVC_SLICE_NUM 256
+struct avc_enc_state {
+
+ VAEncSequenceParameterBufferH264 *seq_param;
+ VAEncPictureParameterBufferH264 *pic_param;
+ VAEncSliceParameterBufferH264 *slice_param[MAX_AVC_SLICE_NUM];
+ VAEncMacroblockParameterBufferH264 *mb_param;
+
+ uint32_t mad_enable:1;
+ //mb skip
+ uint32_t mb_disable_skip_map_enable:1;
+ //static frame detection
+ uint32_t sfd_enable:1;
+ uint32_t sfd_mb_enable:1;
+ uint32_t adaptive_search_window_enable:1;
+ //external mb qp
+ uint32_t mb_qp_data_enable:1;
+ //rolling intra refresh
+ uint32_t intra_refresh_i_enable:1;
+ uint32_t min_max_qp_enable:1;
+ uint32_t skip_bias_adjustment_enable:1;
+
+ uint32_t non_ftq_skip_threshold_lut_input_enable:1;
+ uint32_t ftq_skip_threshold_lut_input_enable:1;
+ uint32_t ftq_override:1;
+ uint32_t direct_bias_adjustment_enable:1;
+ uint32_t global_motion_bias_adjustment_enable:1;
+ uint32_t disable_sub_mb_partion:1;
+ uint32_t arbitrary_num_mbs_in_slice:1;
+ uint32_t adaptive_transform_decision_enable:1;
+ uint32_t skip_check_disable:1;
+ uint32_t tq_enable:1;
+ uint32_t enable_avc_ildb:1;
+ uint32_t suppress_recon_enable:1;
+ uint32_t flatness_check_supported:1;
+ uint32_t transform_8x8_mode_enable:1;
+ uint32_t caf_supported:1;
+ uint32_t mb_status_enable:1;
+ uint32_t mbaff_flag:1;
+ uint32_t enable_force_skip:1;
+ uint32_t rc_panic_enable:1;
+ uint32_t reserved0:7;
+
+ //generic begin
+ uint32_t ref_pic_select_list_supported:1;
+ uint32_t mb_brc_supported:1;
+ uint32_t multi_pre_enable:1;
+ uint32_t ftq_enable:1;
+ uint32_t caf_enable:1;
+ uint32_t caf_disable_hd:1;
+ uint32_t skip_bias_adjustment_supported:1;
+
+ uint32_t adaptive_intra_scaling_enable:1;
+ uint32_t old_mode_cost_enable:1;
+ uint32_t multi_ref_qp_enable:1;
+ uint32_t weighted_ref_l0_enable:1;
+ uint32_t weighted_ref_l1_enable:1;
+ uint32_t weighted_prediction_supported:1;
+ uint32_t brc_split_enable:1;
+ uint32_t slice_level_report_supported:1;
+
+ uint32_t fbr_bypass_enable:1;
+ //mb status output in scaling kernel
+ uint32_t field_scaling_output_interleaved:1;
+ uint32_t mb_variance_output_enable:1;
+ uint32_t mb_pixel_average_output_enable:1;
+ uint32_t rolling_intra_refresh_enable:1;
+ uint32_t mbenc_curbe_set_in_brc_update:1;
+ //rounding
+ uint32_t rounding_inter_enable:1;
+ uint32_t adaptive_rounding_inter_enable:1;
+
+ uint32_t mbenc_i_frame_dist_in_use:1;
+ uint32_t mb_status_supported:1;
+ uint32_t mb_vproc_stats_enable:1;
+ uint32_t flatness_check_enable:1;
+ uint32_t block_based_skip_enable:1;
+ uint32_t use_widi_mbenc_kernel:1;
+ uint32_t kernel_trellis_enable:1;
+ uint32_t generic_reserved:1;
+ //generic end
+
+ //rounding
+ uint32_t rounding_value;
+ uint32_t rounding_inter_p;
+ uint32_t rounding_inter_b;
+ uint32_t rounding_inter_b_ref;
+
+ //min,max qp
+ uint8_t min_qp_i;
+ uint8_t max_qp_i;
+ uint8_t min_qp_p;
+ uint8_t max_qp_p;
+ uint8_t min_qp_b;
+ uint8_t max_qp_b;
+
+ uint8_t non_ftq_skip_threshold_lut[52];
+ uint8_t ftq_skip_threshold_lut[52];
+ uint8_t lamda_value_lut[52][2];
+
+
+ uint32_t intra_refresh_qp_threshold;
+ uint32_t trellis_flag;
+ uint32_t hme_mv_cost_scaling_factor;
+ uint32_t slice_height;//default 1
+ uint32_t slice_num;//default 1
+ uint32_t dist_scale_factor_list0[32];
+ uint32_t bi_weight;
+ uint32_t brc_const_data_surface_width;
+ uint32_t brc_const_data_surface_height;
+
+ uint32_t num_refs[2];
+ uint32_t list_ref_idx[2][32];
+ int32_t top_field_poc[NUM_MFC_AVC_DMV_BUFFERS];
+
+ uint32_t tq_rounding;
+
+ uint32_t zero_mv_threshold; //sfd
+
+ uint32_t slice_second_levle_batch_buffer_in_use;
+ uint32_t slice_batch_offset[MAX_AVC_SLICE_NUM];
+
+};
+
+#endif /* GEN9_AVC_ENCODER_H */
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