On 22 Jan 2015, at 13:06, Steffen Persvold <s...@numascale.com> wrote:
>
> Hi,
>
> Lately we’ve been puzzled by the nodeinfo returned for AMD 63xx based
> platforms so I checked out libvirt from Git and checked out the testcases in
> test/nodeinfodata.
>
> Currently you have 3 AMD test cases there :
>
> linux-x86_64-test3 :
> AMD 6172 2.1 GHz (MCM, 12 cores per package/socket, 2 numa nodes per
> package/socket, 1 thread/core)
> 4 Sockets, 8 NUMA nodes, 48 CPU cores total.
>
> linux-x86_64-test7 :
> AMD 6174 2.2 GHz (MCM, 12 cores per package/socket, 2 numa nodes per
> package/socket, 1 thread/core)
> 2 Sockets, 4 NUMA nodes, 24 CPU cores total.
>
> linux-x86_64-test8 :
> AMD 6282 SE 2.6 GHz (MCM, 8 CU(core) per package/socket, 2 numa nodes
> per package/socket, 2 threads/CU(core))
> 4 Sockets, 8 NUMA nodes, 64 CPU cores total.
>
>
> However, the “expected” output from each of these are wrong I believe :
>
> % ~/libvirt/tests/nodeinfodata$ cat linux-x86_64-test{3,7,8}.expected
> CPUs: 48/48, MHz: 2100, Nodes: 8, Sockets: 1, Cores: 6, Threads: 1
> CPUs: 24/24, MHz: 2200, Nodes: 1, Sockets: 1, Cores: 24, Threads: 1
> CPUs: 64/64, MHz: 2593, Nodes: 1, Sockets: 1, Cores: 64, Threads: 1
>
> In my opinion it should have been :
>
> CPUs: 48/48, MHz: 2100, Nodes: 8, Sockets: 4, Cores: 12, Threads: 1
> CPUs: 24/24, MHz: 2200, Nodes: 4, Sockets: 2, Cores: 12, Threads: 1
> CPUs: 64/64, MHz: 2593, Nodes: 8, Sockets: 4, Cores: 8, Threads: 2
Let me revise that statement a bit. Further looking at the topology in the
nodeinfodata/linux-test{3,7,8} I believe the following would have been the
correct interpretation of the underlying data :
test3:
CPUs: 48/48, MHz: 2100, Nodes: 8, Sockets: 4, Cores: 12, Threads: 1
test7:
CPUs: 24/24, MHz: 2200, Nodes: 1, Sockets: 2, Cores: 12, Threads: 1
test8:
CPUs: 64/64, MHz: 2593, Nodes: 8, Sockets: 4, Cores: 8, Threads: 2
The only difference is test7 which seems to be a case where the NUMA
information isn’t available (but the socket numbering and cores/socket,
threads/socket info is still possible to derive). In this case I believe it’s
still valid to present the CPU topology as described, but with one NUMA cell
only (i.e as if it was an old-fashined two-socket non-numa server).
Any comments ?
Cheers,
--
Steffen Persvold
Chief Architect NumaChip, Numascale AS
Tel: +47 23 16 71 88 Fax: +47 23 16 71 80 Skype: spersvold
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