One of the Valgrind subtools is Cachegrind; this is a cache profiler. (It simulates the I1, D1 and L2 caches so it can pinpoint the sources of cache misses in application code.)
On x86 Cachegrind automatically queries the host CPU to find out what sort/size of cache it has installed, and by default will simulate that sort of cache. (You can also use command line options to specify a different cache layout to model.) On ARM, the ARMv7 VMSA coprocessor registers which describe the cache geometry are privileged-mode access only. This means cachegrind can't do the same "default cache model is the same as your real CPU" behaviour that it does on x86. Can the kernel folks on this list suggest whether it would be a reasonable idea for the kernel to provide some sort of userspace API so tools like cachegrind can find out the cache geometry? Thanks in advance -- PMM _______________________________________________ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
