Blows chunks the same with this

cpus {
                #size-cells = <0>;
                #address-cells = <1>;

cpu@0 {
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0>;
};
cpu@1 {
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <1>;
};
};

I think it's following Lorenzo's method.

-Andy

On 11 June 2013 22:34, Jon Medhurst (Tixy) <t...@linaro.org> wrote:
> On Tue, 2013-06-11 at 22:09 +0800, Andy Green wrote:
>> Thanks.  This and the similar issue with perf might be telling us a
>> global probed SoC capability flag for bL or-ed with the config being
>> there might be helpful.
>
> Now we have accepted DT bindings for cpu nodes [1] perhaps all board's
> device-trees should be updated to use them? I believe that
> 'mpidr_cpuids_count is 0 and nr_cpu_ids is 2' means you don't have cpu
> nodes in your device tree?
>
> And code like gator should use some common kernel functions for looking
> up cpu mappings rather than parsing DT for cpu nodes itself.
>
> I'll make gator behave one way or the other so it doesn't break on
> platforms with missing cpu node or no IKS.
>
> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-May/170234.html
>
> --
> Tixy
>

_______________________________________________
linaro-dev mailing list
linaro-dev@lists.linaro.org
http://lists.linaro.org/mailman/listinfo/linaro-dev

Reply via email to