Pete Zaitcev wrote: >Since interrupt stacks were split, current sits in the prefix page. >Did anyone think about returning it into a register? I am not >sufficiently familiar with the architecture to figure it out. >Candidates include control 10 (PER start), control 15 (Linkage), >and GPR 12. Possibly I missed something. > >I was thinking about abusing X15, but it seems that applications >may do some mischief trying "extract saved registers" instructions. >PER appears to be used, I am not sure if that's actually the case. >So, I am zooming on R12. Anyone wants to comment?
Using control registers is not a good idea: they might have some unintended effect on user space, and also setting/accessing them is slow (they can only be copied from/to memory; also, changing a CR will often cause a SIE intercept in VM). You could use R12 (or any other GPR), but at the cost of increasing register pressure throughout the kernel; currently R12 is used just as any available register (because kernel code is not -fPIC). I don't think this trade-off would be worthwhile. If you want a register that is unused, and fast to access, you could use an access register; preferably AR3. (It is not used, but it is already saved/restored on kernel entry/exit because AR2 and AR4 are used by the kernel.) This would be similar to linuxthreads using AR0 as thread pointer register. (Of course, access regs only have 32-bit even in 64-bit mode which is annoying when you want them to hold a pointer.) However, what's the point? Loading current from the prefix page costs one cycle (assuming it is in L1 cache); on our platform register->register operations and memory->register operations from L1 usually take the same time. Bye, Ulrich
