On Fri, 2010-11-12 at 19:29 -0800, Stepan Moskovchenko wrote: > > +config IOMMU_PGTABLES_L2 > + depends on ARCH_MSM8X60 > + depends on MMU > + depends on CPU_DCACHE_DISABLE=n > + depends on SMP > + bool "Cacheable IOMMU page tables" > + default y > + help > + Allows the IOMMU page tables to be brought into the L2 cache. This > + improves the TLB miss latency at the expense of potential pollution > + of the L2 cache. This option has been shown to improve multimedia > + performance in some cases. > + > + If unsure, say Y here.
Why would someone want this off? The other thing is that you usually want this included with the code that uses the option. Daniel -- Sent by an consultant of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
