hi,
I have forgot to attach that i have configured the chip select timings as
The address line A0 of SA is connected to A0 of cyberpro.
msc2 0xFFF9XXXX (since vga is connected to chip select 5)
i have configured as
bit 0,1 -> 01
variable latency i/o device
bit 2 -> 0
32 bit device
and i have put the maximum timing for all the things below
bit 3,,7 -> 11111
nOE(nWE) assert time for each beat of burst read(write)
bit 8,,12 -> 11111
nOE deassert time between eah beat of burst read(write)
bit 15,,13 ->111
for nCS5:3 variable latency i/o this field will also be used after writes to hold off
subsequent accesses.
i dont know how to configure this.
please help me if there is any fault in this
thanx for time in above matter
murali
On Sat, 10 Nov 2001 Russell King - ARM Linux wrote :
> On Sat, Nov 10, 2001 at 06:54:01AM -0000, Murali Nil
> wrote:
> > The most of the register sets of cyberpro 5000
> contains odd address like
> > (3CE, 3CF....).
> > Since the � SA1110 �which is not accecpting the
> address which is not on
> > the 4 byte boundry he himself changing the address to
> 4 byte boundry by
> > rotating the address.
> >
> > When i tried to give the odd address i am not getting
> the chip select
> > from the processor. And when i tried to write in 4
> byte boundry address
> > (46E8) i am not getting the video ready signal.
>
> You might like to show some of the code you're using to
> try to access the
> chip.
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