>>>>> "Russell" == Russell King <- ARM Linux Admin <[EMAIL PROTECTED]>> writes:
Russell> Philip Blundell writes:
>> Oh, is it? Sigh. No, you can't usually drive PCI reset without
>> resetting the local bus and host cpu as well.
>>
>> What happens if the watchdog fires in non-cfn mode then?
Russell> The 21285 never drives the PCI_RST line when out of
Russell> central-function mode (the chip treats it as an input).
Russell> The data sheet is not clear whether or not the watchdog can
Russell> be used to assert nRESET, however common sense would suggest
Russell> that it should be capable.
Common sense would indeed suggest that, but that's not how it works.
I looked over the EBSA-285 manual and the 21285 data sheet last
night. It turns out the problem is in the chip.
When in central function mode, there are lots of ways to get a reset.
In particular, nRESET is then an input (and the PCI reset signal is an
output). The watchdog mechanism is available, and you can also
generate a reset externally by pulling nRESET low.
However, in not-central-function mode, the ONLY reset mechanism is the
PCI reset signal. In particular, the watchdog does NOT work in that
mode. (This is mentioned in the 21285 data book, the section on
timers.) And nRESET is then only an output.
The EBSA-285 eval board is built according to these points: the
external reset signals are gated through a jumpered enable so they are
fed to the 21285 only if central function is configured.
There are a number of what I would consider design errors in the
21285; you can add these two (no reset and no watchdog) to the list.
paul
unsubscribe: body of `unsubscribe linux-arm' to [EMAIL PROTECTED]
