Philip Blundell writes:
> Russell can probably give you a more definitive answer. I don't really have
> time to experiment with it right now.
No, I don't see anything wrong with the code. It's highly optimised tho...
Here's the explaination of how it works:
The SP is pointing at the stacked r0, hence:
r5
r4
r3
r2
r1
SP-> r0
The LDMIB loads into r0 to r4 the values of r1 to r5, hence shifting
the arguments down one register (LDMIB increments before the load
operation). This is done since the arguments to the syscall are
(syscall_number, arg0, arg1, arg2, ...) and we want arg0 in r0.
Next, to be compliant with APCS r4 is stacked by replacing the original
r0. This is ok, since the value will overwritten later. We now have
the arguments for the system call in r0 to r3, with the fifth argument
on the stack. Plus, more importantly, original r1 - r5 stacking is left
untouched in case we need to redo the call.
We now call the real syscall.
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| | Russell King [EMAIL PROTECTED] --- ---
| | | | http://www.arm.linux.org.uk/~rmk/armlinux.html / / |
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