I think firs thing I'll raise here is that there are two different
"modes" to add-in ebsa285 support:
1. Plain EBSA285 add-in
This is intended to result in a kernel which gives you all
available user space, and be compatable with the ebsa285
host kernel. (this is "new", and probably ought to be
marked as "experimental" at the moment)
2. co-EBSA285
This is Mark's "multi-processor" special thang - he can probably
give you a detailed description of this than me. However, it
does result in all kernel code and userspace squashed into the
lower 2GB.
Bill Arbaugh writes:
> The above change resulting in an error that PCIIACK_BASE was undeclared in
> irq.h. I followed that to include/asm/arch/hardware.h which had at line
> 14:
This is a real problem! include/asm-arm/arch-ebsa285/irq.h shouldn't be
looking at the PCIIACK space, so this should probably be surrounded by
a suitable #ifdef CONFIG_FOOTBRIDGE_HOST macro.
> That gets me through the compile, but then the linker complains of several
> undefined references:
> boot_memory_end
> boot_commandL_line
> have_isa_bridge
>
> The last is from bios32.c which isn't added to the obj list in the kernel
> dir (no idea why). The boot symbols- I can't find.
Well, the "quick hack" approach would be to #define have_isa_bridge 0 where-ever
it is used, but I certainly won't accept a patch like that ;)
It needs to be inteligently defined, dependent on the configuration options
selected by the user (something that I'll sort out for the next release).
The other two were iirc a couple of definitions I wasn't happy about. I don't
think the final hunk is required, and should probably be cut off. (PS, this
is from patch 178/1).
diff -uNr orig/linux/arch/arm/kernel/head-armv.S linux/arch/arm/kernel/head-armv.S
--- orig/linux/arch/arm/kernel/head-armv.S Thu May 6 16:39:24 1999
+++ linux/arch/arm/kernel/head-armv.S Thu May 6 14:30:29 1999
@@ -7,6 +7,7 @@
*/
#include <linux/config.h>
#include <linux/linkage.h>
+#include <asm/hardware.h>
.globl SYMBOL_NAME(swapper_pg_dir)
.equ SYMBOL_NAME(swapper_pg_dir), TEXTADDR - 0x4000
@@ -56,6 +57,46 @@
mov r1, #5
#endif
+#ifdef CONFIG_ARCH_CO285
+ .globl SYMBOL_NAME(boot_command_line)
+ .equ SYMBOL_NAME(boot_command_line), TEXTADDR - 0x5000
+
+ .globl SYMBOL_NAME(boot_memory_end)
+ .equ SYMBOL_NAME(boot_memory_end), TEXTADDR - 0x4004
+ mov r11,#0xfc
+ orr r11,r11,#0x3f00
+ str sp,[r11]
+
+#ifdef DEBUG
+ mov r11,#0x42000000 @ initialize uart
+ mov r12,#0 @ 9600,n,8,1
+ str r12, [r11, #0x174]
+ mov r12,#80
+ str r12, [r11, #0x170]
+ mov r12,#0
+ str r12, [r11, #0x16c]
+ mov r12,#0x70
+ str r12, [r11, #0x168]
+ mov r12,#1
+ str r12, [r11, #0x174]
+ mov r12,#'x'
+ str r12, [r11, #0x160]
+ ldr r12, [r11, #0x178]
+ tst r12,#0x20
+ bne .-8
+ mov r12,#10
+ str r12, [r11, #0x160]
+ ldr r12, [r11, #0x178]
+ tst r12,#0x20
+ bne .-8
+ mov r12,#13
+ str r12, [r11, #0x160]
+ ldr r12, [r11, #0x178]
+ tst r12,#0x20
+ bne .-8
+#endif // DEBUG
+#endif // CONFIG_ARCH_CO285
+
/*
* Entry point and restart point. Entry *must* be called with r0 == 0,
* MMU off. Note! These should be unique!!! Please read Documentation/ARM-README
@@ -127,7 +168,9 @@
* This allows debug messages to be output via a serial
* before/while paging_init.
*/
- add r0, r4, #0x3800
+ mov r14,#(ARMCSR_BASE>>18) & 0xff
+ orr r14,r14,#(ARMCSR_BASE>>18) & 0xff00
+ add r0, r4, r14
orr r3, r6, r8
add r2, r0, #0x0800
1: str r3, [r0], #4
_____
|_____| ------------------------------------------------- ---+---+-
| | Russell King [EMAIL PROTECTED] --- ---
| | | | http://www.arm.linux.org.uk/ / / |
| +-+-+ --- -+-
/ | THE developer of ARM Linux |+| /|\
/ | | | --- |
+-+-+ ------------------------------------------------- /\\\ |
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