> >Interesting. So again I'm inclined to think that the reported problem
> >is due to denormals.
> >
> >I usually do a very blunt ... + 1e-20 at strategic places. So far,
> >nobody has complained about the DC offset :-)
> 
> Similar approach works fine here, too (flipping the sign of the 
> addition constant at every sample or every block, depending on the 
> algorithm in question). 
> 
> Inaudible (in fact barely measurable), code is branchless and simple. 
> Perfect solution for a stupid little problem.
the denormal handling on the sse unit is far better than on the fpu ...
it's also possible to enable hardware FTZ/DAZ ...

better a hardware solution than a software solution ;-)

t

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