On 4/5/06, Lee Revell <[EMAIL PROTECTED]> wrote: > On Wed, 2006-04-05 at 19:52 -0500, Richard Smith wrote: > > > > 60 channels @192/24 is 35Megs/s. A SCSI cards and Gigabit ethernet > > interface do much more than that. Perhaps you could not get super low > > latency running all 60 channels. All 60 channels would take a minimum > > of 300mS to move across the bus. You would need PCI 64/66 at that > ^^^^^ > Do you mean microseconds? To move how many frames?
Ah.. yeah.. I _totally_ fsked up the math. Gotta lay off all that crack. A whole frame of 60 channels @ 24bit is only 1.4 uS. Jeez. talk about being bad wrong. That's good news though. That means an fairly low powered FPGA could do that plus a whole lot more. > Also I don't think 192/24 is really a typical config, most people would > use 96. All the more reason to be able to run at 192/24. Using the onboard PLLs of the FPGA you could pretty much run at whatever sample rate you wanted with just a firmware change. But clocking at 192k gets 96 and 48 with simple divisors. 44.1 could be a special case. Most of the fpga now days have more than 1 pll so you could do 1 for the 192 multiples and one for the 44.1 rate. -- Richard A. Smith
