The DCP needs the bounce buffers, DMA descriptors and result buffers aligned
to 64 bytes (yet another hardware limitation). Make sure they are aligned by
properly aligning the structure which contains them during allocation.
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: David S. Miller <da...@davemloft.net>
Cc: Fabio Estevam <fabio.este...@freescale.com>
Cc: Herbert Xu <herb...@gondor.apana.org.au>
Cc: Shawn Guo <shawn....@linaro.org>
Cc: Tom Lendacky <thomas.lenda...@amd.com>
---
drivers/crypto/mxs-dcp.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
index 08761d6..c7400fe 100644
--- a/drivers/crypto/mxs-dcp.c
+++ b/drivers/crypto/mxs-dcp.c
@@ -29,6 +29,8 @@
#define DCP_MAX_CHANS 4
#define DCP_BUF_SZ PAGE_SIZE
+#define DCP_ALIGNMENT 64
+
/* DCP DMA descriptor. */
struct dcp_dma_desc {
uint32_t next_cmd_addr;
@@ -947,12 +949,16 @@ static int mxs_dcp_probe(struct platform_device *pdev)
}
/* Allocate coherent helper block. */
- sdcp->coh = devm_kzalloc(dev, sizeof(*sdcp->coh), GFP_KERNEL);
+ sdcp->coh = devm_kzalloc(dev, sizeof(*sdcp->coh) + DCP_ALIGNMENT,
+ GFP_KERNEL);
if (!sdcp->coh) {
ret = -ENOMEM;
goto err_mutex;
}
+ /* Re-align the structure so it fits the DCP constraints. */
+ sdcp->coh = PTR_ALIGN(sdcp->coh, DCP_ALIGNMENT);
+
/* Restart the DCP block. */
ret = stmp_reset_block(sdcp->base);
if (ret)
--
1.8.5.2
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